參數(shù)資料
型號(hào)： AOD417
廠商： ALPHA
元件分類： MOSFETs
英文描述： P-Channel Enhancement Mode Field Effect Transistor
中文描述： 的P -溝道增強(qiáng)型場(chǎng)效應(yīng)晶體管
文件頁(yè)數(shù)： 2/5頁(yè)
文件大小： 126K
代理商： AOD417
AOD417
Symbol
STATIC PARAMETERS
Drain-Source Breakdown Voltage
Min
Typ
Max
Units
BV
DSS
-30
V
-1
-5
T
J
=55°C
I
GSS
V
GS(th)
I
D(ON)
±100
-3
nA
V
A
-1
-60
-1.9
27
36
40
18
34
T
J
=125°C
55
m
g
FS
V
SD
I
S
DYNAMIC PARAMETERS
S
V
A
-0.75
-1
-6
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
920
140
90
6
pF
pF
pF
9
Q
g
(10V)
Q
g
(4.5V)
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
16.2
8.2
2.9
3.6
8
30
22
26
23
14
nC
nC
nC
nC
ns
ns
ns
ns
ns
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=0V, V
DS
=-15V, f=1MHz
Gate Drain Charge
Total Gate Charge (10V)
Total Gate Charge (4.5V)
Gate Source Charge
V
GS
=-10V, V
DS
=-15V, I
D
=-20A
V
GS
=-10V, V
DS
=-15V, R
L
=0.75
,
R
GEN
=3
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
m
V
GS
=-4.5V, I
D
=-7A
V
DS
=-5V, I
D
=-20A
I
S
=-1A,V
GS
=0V
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
I
DSS
μ
A
Gate Threshold Voltage
On state drain current
V
DS
=V
GS
I
D
=-250
μ
A
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-20A
V
DS
=-24V, V
GS
=0V
V
DS
=0V, V
GS
=±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-20A, dI/dt=100A/
μ
s
I
D
=-250
μ
A, V
GS
=0V
I
F
=-20A, dI/dt=100A/
μ
s
A: The value of R
θ
JA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with
T
A
=25°C. The Power dissipation P
DSM
is based on R
θ
JA
(<10s) and the maximum allowed junction temperature of 150°C. The value in any given
application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation P
D
is based on T
J(MAX)
=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=175°C.
D. The R
θ
JA
is the sum of the thermal impedence from junction to case R
θ
JC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
μ
s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of T
J(MAX)
=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The SOA
curve provides a single pulse rating.
Rev 0: Oct. 2006
Alpha & Omega Semiconductor, Ltd.
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