參數(shù)資料
型號： AM49LV128BMH11NS
廠商： SPANSION LLC
元件分類： 存儲器
英文描述： 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA64
封裝： 12 X 9 MM, FBGA-64
文件頁數(shù)： 6/98頁
文件大小： 1016K
代理商： AM49LV128BMH11NS
4
Am49LV128BM
June 17, 2004
Read TIming #1 (Basic Timing) . . . . . . . . . . 63
Read Timing #2 (OE# and Address Access) . . 64
Read Timing #3 (LB#/UB# Byte Access) . . . . 65
Read Timing #4 (Page Access after CE1#
Control Access) . . . . . . . . . . . . . . . . . . . . . 65
Read Timing #5 (Random and Page Address
Access) . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Write Timing #1 (Basic Timing). . . . . . . . . . 67
Write Timing #2 (WE# Control) . . . . . . . . . . 67
Write Timing #3-1 (WE#/LB#/UB# Byte Write
Control) . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Write Timing #3-2 (WE#/LB#/UB# Byte Write
Control) . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Write Timing #3-3 (WE#/LB#/UB# Byte Write
Control) . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Write Timing #3-4 (WE#/LB#/UB# Byte Write
Control) . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Read/Write Timing #1-1 (CE1# Control) . . . 71
Read/Write Timing #1-2 (CE1#/WE#/OE#
Control) . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Read/Write Timing #2 (OE#, WE# Control) . 72
Read/Write Timing #3 (OE#, WE#, LB#, UB#
Control) . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Power-up Timing #1 . . . . . . . . . . . . . . . . . 73
Power-up Timing #2 . . . . . . . . . . . . . . . . . 73
Power-down Entry and Exit Timing. . . . . . . . 74
Standby Entry Timing after Read or Write . . . 74
AM49LV128BM MCP With Second PSRAM
Supplier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
pSRAM Block Diagram . . . . . . . . . . . . . . . . . . . . . 76
Absolute Maximum Ratings (Note 1) . . . . . . . . . .76
Operating Characteristics (Over Specified
Temperature Range) . . . . . . . . . . . . . . . . . . . . . . . 77
Output Load Circuit . . . . . . . . . . . . . . . . . . . . . . . .78
Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79
Timing of Read Cycle (CE# = OE# = V
IL
,
WE# = V
IH
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Timing Waveform of Read Cycle (WE#=V
IH
) . . . 81
Timing Waveform of Page Mode Read Cycle
(WE# = V
IH
). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Timing Waveform of Write Cycle
(WE# Control). . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Timing Waveform of Write Cycle
(CE# Control) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Timing Waveform for Successive WE# Write
Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Timing Waveform of Page Mode Write Cycle. . 86
Reduced Memory Size (RMS) . . . . . . . . . 86
Partial Array Refresh (PAR) . . . . . . . . . . . 86
Deep Sleep Mode . . . . . . . . . . . . . . . . . . 87
Variable Address Register . . . . . . . . . . . . . . . . . . 88
Variable Address Register (VAR) Update
Timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Deep Sleep Mode - Entry/Exit Timings . . . . . . . .90
Address Patterns for PAR (A3 = 0, A4 = 1) . . . . . . 91
Address Patterns for RMS (A3 = 1, A4 = 1) . . . . . 92
Low Power ICC Characteristics for PSRAM . . . . 93
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . .94
TLD064–64-Ball Fine-pitch Ball Grid Array .............................94
Revision Summary. . . . . . . . . . . . . . . . . . . . . . . . . 95
相關(guān)PDF資料
PDF描述
AM49LV128BMH11NT 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMH15NS 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMH15NT 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BML11NS 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BML11NT 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM49LV128BMH11NT 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMH15NS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BMH15NT 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BML11NS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
AM49LV128BML11NT 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit)
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