參數(shù)資料
型號: AM42BDS640AGTD9IS
廠商: SPANSION LLC
元件分類: 存儲器
英文描述: LJT 13C 13#22D SKT WALL RECP
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA93
封裝: 8 X 11.60 MM, FBGA-93
文件頁數(shù): 47/72頁
文件大?。?/td> 1060K
代理商: AM42BDS640AGTD9IS
46
Am42BDS640AG
November 1, 2002
P R E L I M I N A R Y
AC CHARACTERISTICS
Figure 17.
Reduced Wait-State Handshaking Burst Mode Read
Starting at an Odd Address
Notes:
1. Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed from two
cycles to seven cycles. Clock is set for active rising edge.
2. If any burst address occurs at a 64-word boundary, one additional clock cycle is inserted, and is indicated by RDY.
3. The device is in synchronous mode.
4. This waveform represents a synchronous burst mode, the device will also operate in reduced wait-state handshaking under
a CLK synchronous burst mode.
Da
Da + 1
Da + n
OE#
DQ15
-
DQ0
A21
-
A0
Aa
AVD#
RDY
CLK
CE#f
t
CAS
t
AAS
t
AVC
t
AVD
t
AAH
t
OE
t
RACC
t
OEZ
t
CEZ
t
IACC
t
ACC
t
BDH
7 cycles for initial access shown.
Hi-Z
Hi-Z
Hi-Z
1
2
3
4
5
7
8
t
RDYS
t
BACC
6
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