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參數(shù)資料
| 型號： | AM42BDS640AGBD8IT |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲器 |
| 英文描述： | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA93 |
| 封裝： | 8 X 11.60 MM, FBGA-93 |
| 文件頁數(shù)： | 69/72頁 |
| 文件大?。?/td> | 1060K |
| 代理商： | AM42BDS640AGBD8IT |
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68
Am42BDS640AG
November 1, 2002
P R E L I M I N A R Y
FLASH ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25
°
C, 2.0 V V
CC
, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90
°
C, V
CC
= 1.8 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
Table
14
for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
FLASH LATCHUP CHARACTERISTICS
Note:
Includes all pins except V
CC
. Test conditions: V
CC
= 3.0 V, one pin at a time.
PACKAGE PIN CAPACITANCE
Note:
Test conditions T
A
= 25°C, f = 1.0 MHz.
FLASH DATA RETENTION
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time (32 Kword or 8 Kword)
0.4
5
sec
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
54
sec
Word Program Time
11.5
210
μs
Excludes system level
overhead (Note 5)
Accelerated Word Program Time
4
120
μs
Chip Program Time (Note 3)
48
144
sec
Accelerated Chip Program Time
16
48
sec
Description
Min
Max
Input voltage with respect to V
SS
on all pins except I/O pins
(including OE#, and RESET#)
–1.0 V
12.5 V
Input voltage with respect to V
SS
on all I/O pins
–1.0 V
V
CC
+ 1.0 V
V
CC
Current
–100 mA
+100 mA
Parameter
Symbol
Description
Test Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0
11
14
pF
C
OUT
Output Capacitance
V
OUT
= 0
12
16
pF
C
IN2
Control Pin Capacitance
V
IN
= 0
14
16
pF
C
IN3
WP#/ACC Pin Capacitance
V
IN
= 0
17
20
pF
Parameter Description
Test Conditions
Min
Unit
Minimum Pattern Data Retention Time
150
°
C
125
°
C
10
Years
20
Years
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| AM42BDS640AGBD9I | 制造商:Spansion 功能描述:COMBO 4MX16 FALSH + 1MX16 SRAM 1.8V 93FBGA - Trays |
| AM42BDS640AGBD9IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM42BDS640AGBD9IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM42BDS640AGTC8IS | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Burst Mode Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM |
| AM42BDS640AGTC8IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Burst Mode Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM |
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