參數(shù)資料
型號: ADV7604BBCZ-5P
廠商: Analog Devices Inc
文件頁數(shù): 8/20頁
文件大小: 0K
描述: IC DIGITIZER VID/GRAPHIC 260BGA
標(biāo)準(zhǔn)包裝: 1
系列: Advantiv®
類型: 視頻數(shù)字轉(zhuǎn)換器
應(yīng)用: HDTV
安裝類型: 表面貼裝
封裝/外殼: 260-LFBGA,CSBGA
供應(yīng)商設(shè)備封裝: 260-CSPBGA(15x15)
包裝: 托盤
ADV7604
Data Sheet
Rev. D | Page 16 of 20
Pin No.
Mnemonic
Type
Description
U7
P26
Digital video output
Video Pixel Output Port.
U8
DCLKIN
External clock and
clamp
External Clock for ADC Sampling. This is an optional mode of operation for the
U9
P28
Digital video output
Video Pixel Output Port.
U10
DGND
Ground
Ground.
U11
P31
Digital video output
Video Pixel Output Port.
U12
P33
Digital video output
Video Pixel Output Port.
U13
P35
Digital video output
Video Pixel Output Port.
U14
AGND
Ground
Ground.
U15
SYNC1
Analog input
Synchronization on greenor luma input (SOG/SOY). Used in embedded
synchronization mode. User configurable.
U16
AVDD
Power
Analog Supply Voltage (1.8 V).
U17
AVDD
Power
Analog Supply Voltage (1.8 V).
U18
AIN4
Analog video input
Analog Video Input Channel.
V1
DGND
Ground
Ground.
V2
P18
Digital video output
Video Pixel Output Port.
V3
P20
Digital video output
Video Pixel Output Port.
V4
P22
Digital video output
Video Pixel Output Port.
V5
P24
Digital video output
Video Pixel Output Port.
V6
DGND
Ground
Ground.
V7
P27
Digital video output
Video Pixel Output Port.
V8
LLC
Digital video output
Line Locked Output Clock for the Pixel data. Range is 13.5 MHz to 170 MHz.
V9
P29
Digital video output
Video Pixel Output Port.
V10
DGND
Ground
Ground.
V11
P30
Digital video output
Video Pixel Output Port.
V12
P32
Digital video output
Video Pixel Output Port.
V13
P34
Digital video output
Video Pixel Output Port.
V14
AGND
Ground
Ground.
V15
AIN1
Analog video input
Analog Video Input Channel.
V16
AIN2
Analog video input
Analog Video Input Channel.
V17
AIN3
Analog video input
Analog Video Input Channel.
V18
AGND
Ground
Ground.
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