參數(shù)資料
型號(hào)： ADV7181BST
廠商： ANALOG DEVICES INC
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： Multiformat SDTV Video Decoder
中文描述： COLOR SIGNAL DECODER, PQFP64
封裝： LEAD FREE, MS-026BCD, LQFP-64
文件頁數(shù)： 82/96頁
文件大?。?/td> 873K
代理商： ADV7181BST
ADV7181B
Rev. 0 | Page 82 of 96
Bits
4
1
Subaddress
0x41
Register
Resample
Control
Bit Description
Reserved
SFL_INV. Controls the behavior of
the PAL switch bit.
7
6
0
5
0
3
0
2
0
1
0
0
0
Comments
Set to default
SFL compatible with
ADV7190/ADV7191/
ADV7194 encoders
SFL compatible with
ADV717x/ADV7173x
encoders
Set to default
GDECEL[15:0]. 16
individual enable bits that
select the lines of video
(even field Lines 10–25)
that the decoder checks
for Gemstar-compatible
data.
Notes
1
Reserved
GDECEL[15:8]. See the Comments
column.
GDECEL[7:0]. See above.
0
0
0
0
0
0
0
0
0
LSB = Line 10 MSB =
Line 25
Default = Do not
check for Gemstar-
compatible data on
any lines [10–25] in
even fields
LSB = Line 10 MSB =
Line 25
Default = Do not
check for Gemstar-
compatible data on
any lines [10–25] in
odd fields
To avoid 00/FF code.
0x48
Gemstar
Control 1
Gemstar
Control 2
0x49
0
0
0
0
0
0
0
0
0x4A
Gemstar
Control 3
GDECOL[15:8]. See the Comments
column.
GDECOL[7:0]. See above.
0
0
0
0
0
0
0
0
0x4B
Gemstar
Control 4
0
0
0
0
0
0
0
0
GDECOL[15:0]. 16
individual enable bits that
select the lines of video
(odd field Lines 10–25)
that the decoder checks
for Gemstar-compatible
data.
0
Split data into half byte
GDECAD. Controls the manner in
which decoded Gemstar data is
inserted into the horizontal blanking
period.
1
Output in straight 8-bit
format
0x4C
Gemstar
Control 5
Reserved
CTI_EN. CTI enable
x
x
x
x
x
x
x
0
1
0
1
Undefined
Disable CTI
Enable CTI
Disable CTI alpha blender
Enable CTI alpha blender
CTI_AB_EN. Enables the mixing of
the transient improved chroma with
the original signal.
CTI_AB[1:0]. Controls the behavior
of the alpha-blend circuitry.
1
0
1
0
0
1
0
0
0
0
0
1
1
1
0
1
0
1
0
0
0
Sharpest mixing
Sharp mixing
Smooth
Smoothest
Set to default
Bypass the DNR block
Enable the DNR block
Set to default
Set to 0x04 for A/V input;
set to 0x0A for tuner input
Reserved
DNR_EN. Enable or bypass the DNR
block.
0x4D
CTI DNR
Control 1
Reserved
CTI_CTH[7:0]. Specifies how big the
amplitude step must be to be
steepened by the CTI block.
DNR_TH[7:0]. Specifies the
maximum edge that is interpreted
as noise and is therefore blanked.
0x4E
CTI DNR
Control 2
0x50
CTI DNR
Control 4
0 0
0
0
1
0
0
0
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參數(shù)描述
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ADV7181CBCPZ 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
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ADV7181CBSTZ-REEL 功能描述:IC VIDEO DECODER SDTV RGB 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
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