參數(shù)資料
型號(hào): ADV7128KR80
廠(chǎng)商: ANALOG DEVICES INC
元件分類(lèi): DAC
英文描述: CMOS 80 MHz, 10-Bit Video DAC
中文描述: PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PDSO28
封裝: SOIC-28
文件頁(yè)數(shù): 2/8頁(yè)
文件大?。?/td> 135K
代理商: ADV7128KR80
REV. 0
–2–
ADV7128–SPECIFICATIONS
(V
AA
= +5 V
6
5%; V
REF
= +1.235 V; R
L
= 37.5
V
, C
L
= 10 pF; R
SET
= 560
V
.
All specifications T
MN
to T
MAX1
unless otherwse noted.)
Parameter
K Version
Units
T est Conditions/Comments
ST AT IC PERFORMANCE
Resolution
Accuracy
Integral Nonlinearity, INL
Differential Nonlinearity, DNL
Gray Scale Error
Coding
DIGIT AL INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN2
ANALOG OUT PUT
Gray Scale Current Range
10
Bits
±
1
±
1
±
5
LSB max
LSB max
% Gray Scale max
Binary
Guaranteed Monotonic
Max Gray Scale Current = (V
REF
* 7,969/R
SET
) mA
2
0.8
±
1
10
V min
V max
μ
A max
pF max
V
IN
= 0.4 V or 2.4 V
15
22
mA min
mA max
Output Current
White Level
16.74
18.50
0
50
17.28
0
+1.4
100
30
mA min
mA max
μ
A min
μ
A max
μ
A typ
V min
V max
k
typ
pF max
T ypically 17.62 mA
Black Level
T ypically 5
μ
A
LSB Size
Output Compliance, V
OC
Output Impedance, R
OUT2
Output Capacitance, C
OUT2
I
OUT
= 0 mA
VOLT AGE REFERENCE
Voltage Reference Range, V
REF
Input Current, I
VREF
POWER REQUIREMENT S
V
AA
I
AA
1.14/1.26
–5
V min/V max
mA typ
V
REF
= 1.235 V for Specified Performance
5
125
100
0.5
625
500
V nom
mA max
mA max
%/% max
mW max
mW max
T ypically 80 mA: 80 MHz Parts
T ypically 70 mA: 50 MHz & 35 MHz Parts
T ypically 0.12%/%: f = 1 kHz, COMP = 0.1
μ
F
T ypically 400 mW: 80 MHz Parts
T ypically 350 mW: 50 MHz & 30 MHz Parts
Power Supply Rejection Ratio
2
Power Dissipation
DYNAMIC PERFORMANCE
Glitch Impulse
2, 3
DAC Noise
2, 3, 4
50
200
pV secs typ
pV secs typ
NOT ES
1
T emperature range (T
to T
); 0
°
C to +70
°
C.
2
Sample tested at +25
°
C to ensure compliance.
3
T T L input values are 0 to 3 volts, with input rise/fall times
3 ns, measured between the 10% and 90% points. T iming reference points at 50% for inputs and
outputs. See timing notes in Figure 1.
4
T his includes effects due to clock and data feedthrough.
Specifications subject to change without notice.
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