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參數(shù)資料
| 型號： | ADV601LCJSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CODEC VIDEO DSP/SRL 120LQFP |
| 標準包裝： | 1 |
| 類型： | 視頻編解碼器 |
| 數(shù)據(jù)接口： | DSP，串行 |
| 分辨率（位）： | 8 b |
| 三角積分調(diào)變： | 無 |
| 電壓 - 電源，模擬： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，數(shù)字： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 120-LQFP |
| 供應商設備封裝： | 120-LQFP（14x14） |
| 包裝： | 托盤 |
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ADV601LC
–13–
REV. 0
HSTART Register
Indirect (Write Only) Register Index 0x02
This register holds the setting for the horizontal start of the ADV601LC’s active video area. The value in this register is usually set to
zero, but in cases where you wish to crop incoming video it is possible to do so by changing HST.
[9:0]
Horizontal Start, HST[9:0]. 10-bit value defining the start of the active video region. (0 at reset)
[15:10] Reserved (always write zero)
HEND Register
Indirect (Write Only) Register Index 0x03
This register holds the setting for the horizontal end of the ADV601LC’s active video area. If the value is larger than the max size of
the selected video mode, the ADV601LC uses the max size of the selected mode for HEND.
[9:0]
Horizontal End, HEN[9:0].10-bit value defining the end of the active video region. (0x3FF at reset this value is larger than
the max size of the largest video mode)
[15:10] Reserved (always write zero)
VSTART Register
Indirect (Write Only) Register Index 0x04
This register holds the setting for the vertical start of the ADV601LC’s active video area. The value in this register is usually set to
zero unless you want to crop the active video.
To vertically crop video while encoding, program the VSTART and VEND registers with actual video line numbers, which differ for
each field. The VSTART and VEND contents must be updated on each field. Perform this updating as part of the field-by-field BW regis-
ter update process. To perform this dynamic update correctly, the update software must keep track of which field is being processed next.
[9:0]
Vertical Start, VST[9:0]. 10-bit value defining the starting line of the active video region, with line numbers from 1-to-625
in PAL and 1-to-525 in NTSC. (0 at reset)
[15:10] Reserved (always write zero)
VEND Register
Indirect (Write Only) Register Index 0x05
This register holds the setting for the vertical end of the ADV601LC’s active video area. If the value is larger than the max size of the
selected video mode, the ADV601LC uses the max size of the selected mode for VEND.
To vertically crop video while encoding, program the VSTART and VEND registers with actual video line numbers, which differ for each
field. The VSTART and VEND contents must be updated on each field. Perform this updating as part of the field-by-field BW register
update process. To perform this dynamic update correctly, the update software must keep track of which field is being processed next.
[9:0]
Vertical End, VEN[9:0]. 10-bit value defining the ending line of the active video region, with line numbers from 1-to-625
in PAL and 1-to-525 in NTSC. (0x3FF at reset—this value is larger than the max size of the largest video mode)
[15:10] Reserved (always write zero)
VIDEO AREA REGISTERS
The area defined by the HSTART, HEND, VSTART and VEND registers is the active area that the wavelet kernel processes. Video
data outside the active video area is set to minimum luminance and zero chrominance (black) by the ADV601LC. These registers
allow cropping of the input video during compression (encode only), but do not change the image size. Figure 10 shows how the
video area registers work together.
Some comments on how these registers work are as follows:
The vertical numbers include the blanking areas of the video.
Specifically, a VSTART value of 21 will include the first line
of active video, and the first pixel in a line corresponds to a
value HSTART of 0 (for NTSC regular).
Note that the vertical coordinates start with 1, whereas the
horizontal coordinates start with 0.
The default cropping mode is set for the entire frame. Specifi-
cally, Field 2 starts at a VSTART value of 283 (for NTSC
regular).
Figure 10. Video Area and Video Area Registers
VSTART
VEND
HSTART
HEND
ZERO
X, Y
ACTIVE VIDEO AREA
0, 0
ZERO
MAX FOR SELECTED VIDEO MODE
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADV601LCJSTZRL | 功能描述:IC CODEC VIDEO DSP/SRL 120LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| ADV601LC-VIDEOPIPE | 制造商:Analog Devices 功能描述:TOOLS:DEVELOPMENT BOARDS H/W 制造商:Analog Devices 功能描述:EVALUATION BOARD ((NS)) |
| ADV601XS | 制造商:Analog Devices 功能描述: |
| ADV611 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CLOSED CIRCUIT TV DIGITAL VIDEO CODEC |
| ADV611JST | 制造商:Analog Devices 功能描述:Video Compression 120-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:CLOSED CIRCUIT TV VIDEO CODEC - TQFP PKG - Tape and Reel |
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