參數(shù)資料
型號: ADSP21020
廠商: Analog Devices, Inc.
元件分類: 數(shù)字信號處理
英文描述: 32/40-Bit IEEE Floating-Point DSP Microprocessor
中文描述: 32/40 IEEE浮點(diǎn)DSP微處理器
文件頁數(shù): 11/32頁
文件大?。?/td> 425K
代理商: ADSP21020
ADSP-21020
REV. C
–11–
Table Vll. Multifunction Compute Operations
Fixed-Point
Rm=R3-0 * R7-4 (SSFR), Ra=R11-8 + R15-12
Rm=R3-0 * R7-4 (SSFR), Ra=R11-8 – R15-12
Rm=R3-0 * R7-4 (SSFR), Ra=(R11-8 + R15-12)/2
MRF=MRF + R3-0 * R7-4 (SSF), Ra=R11-8 + R15-12
MRF=MRF + R3-0 * R7-4 (SSF), Ra=R11-8 – R15-12
MRF=MRF + R3-0 * R7-4 (SSF), Ra=(R11-8 + R15-12)/2
Rm=MRF + R3-0 * R7-4 (SSFR), Ra=R11-8 + R15-12
Rm=MRF + R3-0 * R7-4 (SSFR), Ra=R11-8 – R15-12
Rm=MRF + R3-0 * R7-4 (SSFR), Ra=(R11-8 + R15-12)/2
MRF=MRF – R3-0 * R7-4 (SSF), Ra=R11-8 + R15-12
MRF=MRF – R3-0 * R7-4 (SSF), Ra=R11-8 – R15-12
MRF=MRF – R3-0 * R7-4 (SSF), Ra=(R11-8 + R15-12)/2
Rm=MRF – R3-0 * R7-4 (SSFR), Ra=R11-8 + R15-12
Rm=MRF – R3-0 * R7-4 (SSFR), Ra=R11-8 – R15-12
Rm=MRF – R3-0 * R7-4 (SSFR), Ra=(R11-8 + R15-12)/2
Rm=R3-0 * R7-4 (SSFR), Ra=R11-8 + R15-12,
Rs=R11-8 – R15-12
Floating-Point
Fm=F3-0 * F7-4, Fa=F11-8 + F15-12
Fm=F3-0 * F7-4, Fa=F11-8 – F15-12
Fm=F3-0 * F7-4, Fa=FLOAT R11-8 by R15-12
Fm=F3-0 * F7-4, Fa=FIX R11-8 by R15-12
Fm=F3-0 * F7-4, Fa=(F11-8 + F15-12)/2
Fm=F3-0 * F7-4, Fa=ABS F11-8
Fm=F3-0 * F7-4, Fa=MAX (F11-8, F15-12)
Fm=F3-0 * F7-4, Fa=MIN (F11-8, F15-12)
Fm=F3-0 * F7-4, Fa=F11-8 + F15-12,
Fs=F11-8 – F15-12
Ra, Rm
R3-0
R7-4
R11-8
R15-12
Fa, Fm
F3-0
F7-4
F11-8
F15-12
(SSF)
(SSFR)
Any register file location (fixed-point)
R3, R2, R1, R0
R7, R6, R5, R4
R11, R10, R9, R8
R15, R14, R13, R12
Any register file location (floating-point)
F3, F2, F1, F0
F7, F6, F5, F4
F11, F10, F9, F8
F15, F14, F13, F12
X-input signed, Y-input signed, fractional inputs
X-input signed, Y-input signed, fractional inputs, rounded output
Table VIII. Interrupt Vector Addresses and Priorities
Vector
Address
(Hex)
No.
Function
0
1*
2
3
0x00
0x08
0xl0
0xl8
Reserved
Reset
Reserved
Status stack or loop stack overflow or
PC stack full
Timer=0 (high priority option)
IRQ3
asserted
IRQ2
asserted
IRQ1
asserted
IRQ0
asserted
Reserved
Reserved
DAG 1 circular buffer 7 overflow
DAG 2 circular buffer 15 overflow
Reserved
Timer=0 (low priority option)
Fixed-point overflow
Floating-point overflow
Floating-point underflow
Floating-point invalid operation
Reserved
User software interrupts
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19–23
24–31
0x20
0x28
0x30
0x38
0x40
0x48
0x50
0x58
0x60
0x68
0x70
0x78
0x80
0x88
0x90
0x98-0xB8
0xC0–OxF8
*Nonmaskable
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