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參數(shù)資料
| 型號(hào)： | ADSP-21XX1111 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ADSP-2100 Family DSP Microcomputers |
| 中文描述： | 的ADSP - 2100系列DSP的微機(jī) |
| 文件頁(yè)數(shù)： | 29/32頁(yè) |
| 文件大?。?/td> | 231K |
| 代理商： | ADSP-21XX1111 |
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ADSP-21mod870
–29–
REV. 0
TIMING PARAMETERS
Parameter
Min
Max
Unit
IDMA Read, Long Read Cycle
Timing Requirements
:
t
IKR
t
IRK
Switching Characteristics
:
t
IKHR
t
IKDS
t
IKDH
t
IKDD
t
IRDE
t
IRDV
t
IRDH1
t
IRDH2
IACK
Low before Start of Read
1
End of Read after
IACK
Low
2
0
2
ns
ns
IACK
High after Start of Read
1
IAD15–0 Data Setup before
IACK
Low
IAD15–0 Data Hold after End of Read
3
IAD15–0 Data Disabled after End of Read
3
IAD15–0 Previous Data Enabled after Start of Read
IAD15–0 Previous Data Valid after Start of Read
IAD15–0 Previous Data Hold after Start of Read (DM/PM1)
2
IAD15–0 Previous Data Hold after Start of Read (PM2)
4
4
0.5 t
CK
– 7
0
15
ns
ns
ns
ns
ns
ns
ns
ns
10
0
10
2 t
CK
– 5
t
CK
– 5
NOTES
1
Start of Read =
IS
Low and
IRD
Low.
2
DM read or first half of PM read.
3
End of Read =
IS
High or
IRD
High.
4
Second half of PM read.
t
IKR
PREVIOUS
DATA
READ
DATA
t
IKHR
t
IKDS
t
IRDV
t
IRDH
t
IKDD
t
IRDE
t
IKDH
IAD15–0
IACK
IS
IRD
t
IRK
Figure 31. IDMA Read, Long Read Cycle
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