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參數(shù)資料
| 型號(hào)： | ADSP-21MOD980N |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | MultiPort Internet Gateway Processor |
| 中文描述： | 通寶互聯(lián)網(wǎng)網(wǎng)關(guān)處理器 |
| 文件頁數(shù)： | 17/42頁 |
| 文件大?。?/td> | 566K |
| 代理商： | ADSP-21MOD980N |
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17
REV. PrB
6/2001
For current information contact Analog Devices at (800) ANALOGD
ADSP-21mod980N
PRELIMINARY TECHNICAL DATA
ADSP-21mod980N, it may be necessary to reset the target
hardware separately to insure the proper mode selection
state on emulator chip reset. See the ADSP-2100 Family
EZ-Tools data sheet for complete information on ICE
products.
The ICE-Port interface consists of the following
ADSP-21mod980N pins:
EBR
EINT
EE
EBG
ECLK
ERESET
ELIN
EMS
ELOUT
These ADSP-21mod980N pins must be connected only to
the EZ-ICE connector in the target system. These pins have
no function except during emulation, and do not require
pull-up or pull-down resistors. The traces for these signals
between the ADSP-21mod980N and the connector must
be kept as short as possible
—
no longer than 3 inches.
The following pins are also used by the EZ-ICE:
BR
BG
RESET
GND
The EZ-ICE uses the EE (emulator enable) signal to take
control of the ADSP-21mod980N in the target system.
This causes the processor to use its ERESET, EBR, and
EBG pins instead of the RESET, BR, and BG pins. The BG
output is three-stated. These signals do not need to be
jumper-isolated in your system.
The EZ-ICE connects to your target system via a ribbon
cable and a 14-pin female plug. The female plug is plugged
onto the 14-pin connector (a pin strip header) on the target
board.
TARGET BOARD CONNECTOR FOR EZ-ICE PROBE
The EZ-ICE connector (a standard pin strip header) is
shown in
Figure on page 17
. You must add this connector
to your target board design if you intend to use the EZ-ICE.
Be sure to allow enough room in your system to fit the
EZ-ICE probe onto the 14-pin connector.
The 14-pin, 2-row pin strip header is keyed at the Pin 7
location
—
you must remove Pin 7 from the header. The pins
must be 0.025 inch square and at least 0.20 inch in length.
Pin spacing should be 0.1 0.1 inches. The pin strip
header must have at least 0.15 inch clearance on all sides to
accept the EZ-ICE probe plug.
Pin strip headers are available from vendors such as 3M,
McKenzie, and Samtec.
TARGET MEMORY INTERFACE
For your target system to be compatible with the EZ-ICE
emulator, it must comply with the memory interface guide-
lines listed below.
TARGET SYSTEM INTERFACE SIGNALS
When the EZ-ICE board is installed, the performance on
some system signals change. Design your system to be com-
patible with the following system interface signal changes
introduced by the EZ-ICE board:
EZ-ICE emulation introduces an 8 ns propagation
delay between your target circuitry and the processor
on the RESET signal.
EZ-ICE emulation introduces an 8 ns propagation
delay between your target circuitry and the processor
on the BR signal.
EZ-ICE emulation ignores RESET and BR when
single-stepping.
EZ-ICE emulation ignores RESET and BR when in
Emulator Space (processor halted).
EZ-ICE emulation ignores the state of target BR in cer-
tain modes. As a result, the target system may take
control of the processor
’
s external memory bus only if
bus grant (BG) is asserted by the EZ-ICE board
’
s
processor.
Figure 12. Target Board Connector for EZ-ICE
∞
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
KEY (NO PIN)
RESET
BR
BG
TOP VIEW
EBG
EBR
ELOUT
EE
EINT
ELIN
ECLK
EMS
ERESET
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