參數(shù)資料
型號(hào)： ADSP-21990BST
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 16-bit fixed point DSP with Flash
中文描述： 16-BIT, 160 MHz, OTHER DSP, PQFP176
封裝： MS-026BGA, LQFP-176
文件頁(yè)數(shù)： 4/44頁(yè)
文件大?。?/td> 574K
代理商： ADSP-21990BST
ADSP-21990
–4–
REV. 0
Efficient data transfer in the core is achieved with the use of
internal buses:
Program Memory Address (PMA) Bus
Program Memory Data (PMD) Bus
Data Memory Address (DMA) Bus
Data Memory Data (DMD) Bus
Direct Memory Access Address Bus
Direct Memory Access Data Bus
The two address buses (PMA and DMA) share a single external
address bus, allowing memory to be expanded off-chip, and the
two data buses (PMD and DMD) share a single external data
bus. Boot memory space and I/O memory space also share the
external buses.
Program memory can store both instructions and data, permit-
ting the ADSP-21990 to fetch two operands in a single cycle, one
from program memory and one from data memory. The dual
memory buses also let the embedded ADSP-219x core fetch an
operand from data memory and the next instruction from
program memory in a single cycle.
Memory Architecture
The ADSP-21990 provides 8K words of on-chip SRAM
memory. This memory is divided into two blocks: a 4K
×
24-bit
(block 0) and a 4K
×
16-bit (block 1). In addition, the
ADSP-21990 provides a 4K
×
24-bit block of program memory
boot ROM (that is reserved by ADI for boot load routines). The
memory map of the ADSP-21990 is illustrated in Figure 2.
As shown in Figure 2, the two internal memory RAM blocks
reside in memory page 0. The entire DSP memory map consists
of 256 pages (pages 0 to 255), and each page is 64K words long.
External memory space consists of four memory banks
(banks3–0) and supports a wide variety of memory devices. Each
bank is selectable using unique memory select lines (
MS3–0
) and
has configurable page boundaries, wait states, and wait state
modes. The 4K words of on-chip boot ROM populates the top
of page 255, while the remaining 254 pages are addressable off-
chip. I/O memory pages differ from external memory in that they
are 1K word long, and the external I/O pages have their own select
pin (
IOMS
). Pages 31–0 of I/O memory space reside on-chip and
contain the configuration registers for the peripherals. Both the
ADSP-219x core and DMA capable peripherals can access the
the entire memory map of the DSP.
Figure 1. Block Diagram
DATA
ADDRESS
B
SYSTEM INTERRUPT
CONTROLLER
I/O DATA
I/O REGISTERS
(MEMORY-MAPPED)
CONTROL
STATUS
BUFFERS
I/O PROCESSOR
CACHE
64
24-BIT
JTAG
TEST AND
EMULATION
6
ADDR BUS
MUX
DATA BUS
MUX
16
20
PM ADDRESS BUS
DM ADDRESS BUS
PM DATA BUS
DM DATA BUS
PX
24
16
ADSP-219x DSP CORE
PROGRAM
SEQUENCER
DATA
REGISTER
FILE
MULT
BARREL
SHIFTER
ALU
DMA CONTROLLER
INPUT
REGISTERS
RESULT
REGISTERS
16
16-BIT
DAG1
4
4
16
DAG2
4
4
16
INTERNAL MEMORY
24
24
ADDRESS
B
DATA
DATA
ADDRESS
B
24 BIT
16 BIT
16 BIT
FOUR INDEPENDENT BLOCKS
PROGRAMMABLE
FLAGS (16)
TIMERS
(3)
3
DMA CONNECT
DMA ADDRESS
EXTERNAL PORT
18
I/O ADDRESS
24
16
24
DMA DATA
EMBEDDED
CONTROL
PERIPHERALS
AND
COMMUNICATIONS
PORTS
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ADSP-21991BST 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 160MHz 160MIPS 176-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:HIGH PERFORMANCE MIXED SIGNAL DSP - Bulk
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