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| 型號： | ADSP-2187LBSTZ-210 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 100-TQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點(diǎn) |
| 接口： | 主機(jī)接口，串行端口 |
| 時鐘速率： | 52MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 160kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
| 其它名稱： | ADSP-2187LBSTZ210 ADSP-2187LBSTZ210-ND |
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Rev. C
|
Page 22 of 48
|
January 2008
ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed below may cause permanent
damage to the device. These are stress ratings only. Functional
operation of the device at these or any other conditions greater
than those indicated in the operational sections of this specifica-
tion is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
PACKAGE INFORMATION
The information presented in Figure 15 provides details about
the package branding for the ADSP-218xL processors. For a
complete listing of product availability, see Ordering Guide on
ESD SENSITIVITY
TIMING SPECIFICATIONS
General Notes
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results
for an individual device, the values given in this data sheet
reflect statistical variations and worst cases. Consequently,
parameters cannot be added up meaningfully to derive
longer times.
Timing Notes
Switching characteristics specify how the processor changes its
signals. Designers have no control over this timing—circuitry
external to the processor must be designed for compatibility
with these signal characteristics. Switching characteristics tell
what the processor will do in a given circumstance. Switching
characteristics can also be used to ensure that any timing
requirement of a device connected to the processor (such as
memory) is satisfied.
Timing requirements apply to signals that are controlled by cir-
cuitry external to the processor, such as the data input for a read
operation. Timing requirements guarantee that the processor
operates correctly with other devices.
Frequency Dependency For Timing Specifications
tCK is defined as 0.5 tCKI. The ADSP-218xL uses an input clock
with a frequency equal to half the instruction rate. For example,
a 26 MHz input clock (which is equivalent to 38 ns) yields a
19 ns processor cycle (equivalent to 52 MHz). tCK values within
the range of 0.5 tCKI period should be substituted for all relevant
timing parameters to obtain the specification value.
Example: tCKH = 0.5 tCK – 7 ns = 0.5 (19) – 7 ns = 2.5 ns
Parameter
Rating
Supply Voltage (VDD)–0.3 V to +4.6 V
Input Voltage1
1 Applies to bidirectional pins (D23–0, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1,
A13–1, PF7–0) and input only pins (CLKIN, RESET, BR, DR0, DR1, PWD).
–0.5 V to VDD + 0.5 V
Output Voltage Swing2
2 Applies to output pins (BG, PMS, DMS, BMS, IOMS, CMS, RD, WR, PWDACK,
A0, DT0, DT1, CLKOUT, FL2–0, BGH).
–0.5 V to VDD +0.5 V
Operating Temperature Range
– 40°C to +85°C
Storage Temperature Range
– 65°C to +150°C
Figure 15. Typical Package Brand
Table 13. Package Brand Information
Brand Key
Field Description
t
Temperature Range
pp
Package Type
Z
RoHs Compliant Option (optional)
cc
See Ordering Guide
vvvvvv.x
Assembly Lot Code
n.n
Silicon Revision
yyww
Date Code
vvvvvv.x n.n
tppZ-cc
ADSP-218xL
a
yyww country_of_origin
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can discharge
without detection. Although this product features
patented or proprietary protection circuitry, damage
may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid performance degradation or loss of functionality.
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