參數(shù)資料
型號(hào): ADSP-2184NKCA-320
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號(hào)處理
英文描述: DSP Microcomputer
中文描述: 24-BIT, 40 MHz, OTHER DSP, PBGA144
封裝: MO-205AC, BGA-144
文件頁數(shù): 14/48頁
文件大?。?/td> 1571K
代理商: ADSP-2184NKCA-320
ADSP-218xN Series
–14–
REV. 0
Program Memory
Program Memory (Full Memory Mode) is a 24-bit-wide
space for storing both instruction opcodes and data. The
ADSP-218xN series has up to 48K words of Program
Memory RAM on chip, and the capability of accessing up
to two 8K external memory overlay spaces, using the exter-
nal data bus.
Program Memory (Host Mode) allows access to all internal
memory. External overlay access is limited by a single exter-
nal address line (A0). External program execution is not
available in host mode due to a restricted data bus that is
only 16 bits wide.
Data Memory
Data Memory (Full Memory Mode) is a 16-bit-wide space
used for the storage of data variables and for memory-
mapped control registers. The ADSP-218xN series has up
to 56K words of Data Memory RAM on-chip. Part of this
space is used by 32 memory-mapped registers. Support also
exists for up to two 8K external memory overlay spaces
through the external data bus. All internal accesses com-
plete in one cycle. Accesses to external memory are timed
using the wait states specified by the DWAIT register and
the wait state mode bit.
Data Memory (Host Mode) allows access to all internal
memory. External overlay access is limited by a single exter-
nal address line (A0).
Table 8. PMOVLAY Bits
Processor
PMOVLAY
Memory
A13
A12–0
ADSP-2184N
No Internal
Overlay Region
0
No Internal
Overlay Region
0, 4, 5
0, 4, 5, 6, 7
0, 4, 5
1
Not Applicable
Not Applicable
Not Applicable
ADSP-2185N
ADSP-2186N
Internal Overlay
Not Applicable
Not Applicable
Not Applicable
Not Applicable
Not Applicable
ADSP-2187N
ADSP-2188N
ADSP-2189N
All Processors
Internal Overlay
Internal Overlay
Internal Overlay
External Overlay 1
Not Applicable
Not Applicable
Not Applicable
0
Not Applicable
Not Applicable
Not Applicable
13 LSBs of Address Between 0x2000 and
0x3FFF
13 LSBs of Address Between 0x2000 and
0x3FFF
All Processors
2
External Overlay 2
1
Table 9. DMOVLAY Bits
Processor
DMOVLAY
Memory
A13
A12–0
ADSP-2184N
No Internal Overlay
Region
0
No Internal Overlay
Region
0, 4, 5
0, 4, 5, 6, 7, 8
0, 4, 5, 6, 7
1
Not Applicable
Not Applicable
Not Applicable
ADSP-2185N
ADSP-2186N
Internal Overlay
Not Applicable
Not Applicable
Not Applicable
Not Applicable
Not Applicable
ADSP-2187N
ADSP-2188N
ADSP-2189N
All Processors
Internal Overlay
Internal Overlay
Internal Overlay
External Overlay 1
Not Applicable
Not Applicable
Not Applicable
0
Not Applicable
Not Applicable
Not Applicable
13 LSBs of Address
Between 0x0000
and 0x1FFF
13 LSBs of Address
Between 0x0000
and 0x1FFF
All Processors
2
External Overlay 2
1
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