參數(shù)資料
型號: ADSP-2181KS-115
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號處理
英文描述: DSP Microcomputer
中文描述: 24-BIT, 14.4 MHz, OTHER DSP, PQFP128
封裝: PLASTIC, QFP-128
文件頁數(shù): 12/32頁
文件大?。?/td> 290K
代理商: ADSP-2181KS-115
ADSP-2181–SPECIFICATIONS
RECOMMENDEDOPERATINGCONDITIONS
K Grade
Min
B Grade
Min
Parameter
Max
Max
Unit
V
DD
T
AMB
ELECTRICAL CHARACTERISTICS
Supply Voltage
Ambient Operating T emperature
4.5
0
5.5
+70
4.5
–40
5.5
+85
V
°
C
K/B Grades
Min
2.0
2.2
Parameter
V
IH
V
IH
V
IL
V
OH
T est Conditions
@ V
DD
= max
@ V
DD
= max
@ V
DD
= min
@ V
DD
= min
I
OH
= –0.5 mA
@ V
DD
= min
I
OH
= –100
μ
A
6
@ V
DD
= min
I
OL
= 2 mA
@ V
DD
= max
V
IN
= V
DD
max
@ V
DD
= max
V
IN
= 0 V
@ V
DD
= max
V
IN
= V
DD
max
8
@ V
DD
= max
V
IN
= 0 V
8
@ V
DD
= 5.0
T
AMB
= +25
°
C
t
CK
= 34.7 ns
t
CK
= 30 ns
t
CK
= 25 ns
@ V
DD
= 5.0
T
AMB
= +25
°
C
t
CK
= 34.7 ns
11
t
CK
= 30 ns
11
t
CK
= 25 ns
11
@ V
IN
= 2.5 V,
f
IN
= 1.0 MHz,
T
AMB
= +25
°
C
@ V
IN
= 2.5 V,
f
IN
= 1.0 MHz,
T
AMB
= +25
°
C
T yp
Max
Unit
V
V
V
Hi-Level Input Voltage
1, 2
Hi-Level CLK IN Voltage
Lo-Level Input Voltage
1, 3
Hi-Level Output Voltage
1, 4, 5
0.8
2.4
V
V
DD
– 0.3
V
V
OL
Lo-Level Output Voltage
1, 4, 5
0.4
V
I
IH
Hi-Level Input Current
3
10
μ
A
I
IL
Lo-Level Input Current
3
10
μ
A
I
OZH
T hree-State Leakage Current
7
10
μ
A
I
OZL
T hree-State Leakage Current
7
10
μ
A
I
DD
Supply Current (Idle)
9
12
13
15
mA
mA
mA
I
DD
Supply Current (Dynamic)
10
65
73
85
mA
mA
mA
C
I
Input Pin Capacitance
3, 6, 12
8
pF
C
O
Output Pin Capacitance
6, 7, 12, 13
8
pF
NOT ES
1
Bidirectional pins: D0–D23, RFS0, RFS1, SCLK 0, SCLK 1, T FS0, T FS1, A1–A13, PF0–PF7.
2
Input only pins:
RESET
,
BR
, DR0, DR1,
PWD
.
3
Input only pins: CLK IN,
RESET
,
BR
, DR0, DR1,
PWD
.
4
Output pins:
BG
,
PMS
,
DMS
,
BMS
,
IOMS
,
CMS
,
RD
,
WR
, PWDACK , A0, DT 0, DT 1, CLK OUT , FL2-0,
BGH
.
5
Although specified for T T L outputs, all ADSP-2186 outputs are CMOS-compatible and will drive to V
DD
and GND, assuming no dc loads.
6
Guaranteed but not tested.
7
T hree-statable pins: A0–A13, D0–D23,
PMS
,
DMS
,
BMS
,
IOMS
,
CMS
,
RD
,
WR
, DT 0, DT 1, SCLK 0, SCLK 1, T FS0, T FS1, RFS0, RSF1, PF0–PF7.
8
0 V on
BR
, CLK IN Inactive.
9
Idle refers to ADSP-2181 state of operation during execution of IDLE instruction. Deasserted pins are driven to either V
DD
or GND.
10
I
measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (types 1, 4, 5, 12, 13, 14), 30% are type 2
and type 6, and 20% are idle instructions.
11
V
= 0 V and 3 V. For typical figures for supply currents, refer to Power Dissipation section.
12
Applies to T QFP and PQFP package types.
13
Output pin capacitance is the capacitive load for any three-stated output pin.
Specifications subject to change without notice.
–12–
REV. D
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