參數(shù)資料
型號(hào)： ADSP-2173BS-80
廠(chǎng)商： ANALOG DEVICES INC
元件分類(lèi)： 數(shù)字信號(hào)處理
英文描述： DSP Microcomputer
中文描述： 24-BIT, 10 MHz, OTHER DSP, PQFP128
封裝： PLASTIC, QFP-128
文件頁(yè)數(shù)： 44/52頁(yè)
文件大小： 664K
代理商： ADSP-2173BS-80
REV. A
–44–
ADSP-2171/ADSP-2172/ADSP-2173
ADSP-2173
CAPACIT IVE LOADING
Figures 35 and 36 show the capacitive loading characteristics of
the ADSP-2173.
16
8
25
12
28
20
24
150
125
100
75
50
V
DD
= 3.3 V
C
L
– pF
R
Figure 35. Typical Output Rise Time vs. Load Capacitance,
C
L
(at Maximum Ambient Operating Temperature)
NOMINAL
-2
25
+4
+2
+8
+10
+12
150
125
100
75
50
+14
V
C
L
– pF
Figure 36. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
L
(at Maximum Ambient Operating
Temperature)
T E ST CONDIT IONS
Output Disable T ime
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured out-
put high or low voltage to a high impedance state. T he output
disable time (t
DIS
) is the difference of t
MEASURED
and t
DECAY
, as
shown in the Output Enable/Disable diagram. T he time is the
interval from when a reference signal reaches a high or low volt-
age level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage. T he decay time,
t
DECAY
, is dependent on the capacitative load, C
L
, and the cur-
rent load,
i
L
, on the output pin. It can be approximated by the
following equation:
t
DECAY
=
C
L
· 0.5
V
i
L
from which
t
DIS
=
t
MEASURED
±
t
DECAY
is calculated. If multiple pins (such as the data bus) are dis-
abled, the measurement value is that of the last pin to stop
driving.
INPUT
OUTPUT
V
DD
2
V
DD
2
Figure 37. Voltage Reference Levels for AC Measure-
ments (Except Output Enable/Disable)
Output E nable T ime
Output pins are considered to be enabled when that have made
a transition from a high-impedance state to when they start driv-
ing. T he output enable time (t
ENA
) is the interval from when a
reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram. If multiple pins (such as
the data bus) are enabled, the measurement value is that of the
first pin to start driving.
2.0V
1.0V
t
ENA
REFERENCE
SIGNAL
OUTPUT
t
DECAY
V
OH
(MEASURED)
OUTPUT STOPS
DRIVING
OUTPUT STARTS
DRIVING
t
DIS
t
MEASURED
V
OL
(MEASURED)
V
OH
(MEASURED) – 0.5V
V
OL
(MEASURED) +0.5V
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
V
OH
(MEASURED)
V
OL
(MEASURED)
Figure 38. Output Enable/Disable
TO
OUTPUT
PIN
50pF
I
OH
I
OL
V
DD
2
Figure 39. Equivalent Device Loading for AC Measure-
ments (Including All Fixtures)
相關(guān)PDF資料
PDF描述
ADSP-2171 DSP Microcomputer(DSP 微計(jì)算機(jī))
ADSP-2172 DSP Microcomputer(DSP 微計(jì)算機(jī))
ADSP-2173 DSP Microcomputer(DSP 微計(jì)算機(jī))
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