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參數(shù)資料
| 型號： | ADSP-21020BG-100 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 32/40-Bit IEEE Floating-Point DSP Microprocessor |
| 中文描述： | 48-BIT, 25 MHz, OTHER DSP, CPGA223 |
| 封裝： | CERAMIC, PGA-223 |
| 文件頁數(shù)： | 9/32頁 |
| 文件大?。?/td> | 425K |
| 代理商： | ADSP-21020BG-100 |
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ADSP-21020
REV. C
–9–
Table III. Universal Registers
Name
Register File
R15–R0
Program Sequencer
PC*
Function
Register file locations
Program counter; address of instruction cur-
rently executing
Top of PC stack
PC stack pointer
Fetch address
Decode address
Loop termination address, code; top of loop
address stack
Current loop counter; top of loop count stack
Loop count for next nested counter-controlled
loop
Data Address Generators
I7–I0
DAG1 index registers
M7–M0
DAG1 modify registers
L7–L0
DAG1 length registers
B7–B0
DAG1 base registers
I15–I8
DAG2 index registers
M15–M8
DAG2 modify registers
L15–L8
DAG2 length registers
B15–B8
DAG2 base registers
Bus Exchange
PX1
PMD-DMD bus exchange 1 (16 bits)
PX2
PMD-DMD bus exchange 2 (32 bits)
PX
48-bit PX1 and PX2 combination
Timer
TPERIOD
Timer period
TCOUNT
Timer counter
Memory Interface
DMWAIT
Wait state and page size control for data
memory
DMBANK1
Data memory bank 1 upper boundary
DMBANK2
Data memory bank 2 upper boundary
DMBANK3
Data memory bank 3 upper boundary
DMADR*
Copy of last data memory address
PMWAIT
Wait state and page size control for program
memory
PMBANK1
Program memory bank 1 upper boundary
PMADR*
Copy of last program memory address
System Registers
MODE1
Mode control bits for bit-reverse, alternate reg-
isters, interrupt nesting and enable, ALU satu-
ration, floating-point rounding mode and
boundary
MODE2
Mode control bits for interrupt sensitivity,
cache disable and freeze, timer enable, and I/O
flag configuration
IRPTL
Interrupt latch
IMASK
Interrupt mask
IMASKP
Interrupt mask pointer (for nesting)
ASTAT
Arithmetic status flags, bit test, I/O flag values,
and compare accumulator
STKY
Sticky arithmetic status flags, circular buffer
overflow flags, stack status flags (not sticky)
USTAT1
User status register l
USTAT2
User status register 2
PCSTK
PCSTKP
FADDR*
DADDR*
LADDR
CURLCNTR
LCNTR
*read-only
Refer to User’s Manual for bit-level definitions of each register.
Table IV. ALU Compute Operations
Fixed-Point
Floating-Point
Rn = Rx + Ry
Rn = Rx – Ry
Rn = Rx + Ry, Rm = Rx – Ry
Rn = Rx + Ry + CI
Rn = Rx – Ry + CI – l
Rn = (Rx + Ry)/2
COMP(Rx, Ry)
Rn = –Rx
Rn = ABS Rx
Rn = PASS Rx
Rn = MIN(Rx, Ry)
Rn = MAX(Rx, Ry)
Rn = CLIP Rx BY Ry
Rn = Rx + CI
Rn = Rx + CI – 1
Rn = Rx + l
Rn = Rx – l
Rn = Rx AND Ry
Rn = Rx OR Ry
Rn = Rx XOR Ry
Rn = NOT Rx
Fn = Fx + Fy
Fn = Fx – Fy
Fn = Fx + Fy, Fm = Fx – Fy
Fn = ABS (Fx + Fy)
Fn = ABS (Fx – Fy)
Fn = (Fx + Fy)/2
COMP(Fx, Fy)
Fn = –Fx
Fn = ABS Fx
Fn = PASS Fx
Fn = MIN(Fx, Fy)
Fn = MAX(Fx, Fy)
Fn = CLIP Fx BY Fy
Fn = RND Fx
Fn = SCALB Fx BY Ry
Rn = MANT Fx
Rn = LOGB Fx
Rn = FIX Fx BY Ry
Rn = FIX Fx
Fn = FLOAT Rx BY Ry
Fn = FLOAT Rx
Fn = RECIPS Fx
Fn = RSQRTS Fx
Fn = Fx COPYSIGN Fy
Rn, Rx, Ry R15–R0; register file location, fixed-point
Fn, Fx, Fy F15–F0; register file location, floating point
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相關代理商/技術參數(shù) |
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| ADSP-21020BG-120 | 制造商:AD 制造商全稱:Analog Devices 功能描述:32/40-Bit IEEE Floating-Point DSP Microprocessor |
| ADSP-21020BG-80 | 制造商:AD 制造商全稱:Analog Devices 功能描述:32/40-Bit IEEE Floating-Point DSP Microprocessor |
| ADSP-21020KG-100 | 制造商:AD 制造商全稱:Analog Devices 功能描述:32/40-Bit IEEE Floating-Point DSP Microprocessor |
| ADSP-21020KG-133 | 制造商:AD 制造商全稱:Analog Devices 功能描述:32/40-Bit IEEE Floating-Point DSP Microprocessor |
| ADSP-21020KG-60 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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