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參數(shù)資料
| 型號： | ADSP-2100A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ADSP-2100 Family DSP Microcomputers |
| 中文描述： | 的ADSP - 2100系列DSP的微機(jī) |
| 文件頁數(shù)： | 16/64頁 |
| 文件大?。?/td> | 668K |
| 代理商： | ADSP-2100A |
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ADSP-21xx
–16–
REV. B
Program Flow Instructions
DO <addr> [UNT IL term] ;
[IF cond] JUMP (Ix) ;
[IF cond] JUMP <addr>;
[IF cond] CALL (Ix) ;
[IF cond] CALL <addr>;
IF [NOT ] FLAG_IN
IF [NOT ] FLAG_IN
[IF cond] SET |RESET |T OGGLE FLAG_OUT [, ...] ;
[IF cond] RT S ;
[IF cond] RT I ;
IDLE [(n)] ;
Do Until Loop
J ump
Call Subroutine
JUMP <addr>;
CALL <addr>;
J ump/Call on Flag In Pin
Modify Flag Out Pin
Return from Subroutine
Return from Interrupt Service Routine
Idle
Miscellaneous Instructions
NOP ;
MODIFY (Ix , My);
[PUSH ST S] [, POP CNT R] [, POP PC] [, POP LOOP] ;
ENA|DIS
SEC_REG [, ...] ;
BIT _REV
AV_LAT CH
AR_SAT
M_MODE
T IMER
G_MODE
Notation Conventions
Ix
Index registers for indirect addressing
My
Modify registers for indirect addressing
<data>
Immediate data value
<addr>
Immediate address value
<exp>
Exponent (shift value) in shift immediate instructions (8-bit signed number)
<ALU>
Any ALU instruction (except divide)
<MAC>
Any multiply-accumulate instruction
<SHIFT >
Any shift instruction (except shift immediate)
cond
Condition code for conditional instruction
term
T ermination code for DO UNT IL loop
dreg
Data register (of ALU, MAC, or Shifter)
reg
Any register (including dregs)
;
A semicolon terminates the instruction
,
Commas separate multiple operations of a single instruction
[ ]
Optional part of instruction
[, ...]
Optional, multiple operations of an instruction
option1
|
option2
List of options; choose one.
No Operation
Modify Address Register
Stack Control
Mode Control
Assembly Code E xample
T he following example is a code fragment that performs the filter tap update for an adaptive filter based on a least-mean-squared
algorithm. Notice that the computations in the instructions are written like algebraic equations.
MF=MX0*MY1(RND), MX0=DM(I2,M1);
MR=MX0*MF(RND), AY0=PM(I6,M5);
DO adapt UNTIL CE;
AR=MR1+AY0, MX0=DM(I2,M1), AY0=PM(I6,M7);
PM(I6,M6)=AR, MR=MX0*MF(RND);
{MF=error*b eta}
adapt:
MODIFY(I2,M3);
MODIFY(I6,M7);
{Point to oldest data}
{Point to start of data}
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADSP-2101 | 16-Bit Fixed-Point DSP(16位定點型DSP) |
| ADSP-21060KB-160 | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21060 | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21060L | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21060LAB-160 | ADSP-2106x SHARC DSP Microcomputer Family |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2100AJG | 制造商:AD 制造商全稱:Analog Devices 功能描述:12.5 MIPS DSP Microprocessor |
| ADSP-2100AJP | 制造商:AD 制造商全稱:Analog Devices 功能描述:12.5 MIPS DSP Microprocessor |
| ADSP-2100AKG | 制造商:AD 制造商全稱:Analog Devices 功能描述:12.5 MIPS DSP Microprocessor |
| ADSP-2100AKP | 制造商:AD 制造商全稱:Analog Devices 功能描述:12.5 MIPS DSP Microprocessor |
| ADSP-2100ASG | 制造商:AD 制造商全稱:Analog Devices 功能描述:12.5 MIPS DSP Microprocessor |
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