參數(shù)資料
型號： ADS7852Y
元件分類： 通用總線功能
英文描述： CMOS 8-Stage Presettable 8-Bit Binary Synchronous Down Counter 16-CDIP -55 to 125
中文描述： 12位，8通道，并行輸出的模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 11/13頁
文件大小： 148K
代理商： ADS7852Y
11
ADS7852
READING DATA
Data from the ADS7852 will appear at pins 15 through 26.
The MSB will output on pin 15 while the LSB will output
on pin 26. The outputs are coded in Straight Binary (with
0V = 000
H
and 5V = FFF
H
). Following a conversion, the
BUSY pin will go HIGH. After BUSY has been HIGH for
at least t
14
seconds, the CS and RD pins may be brought
LOW to enable the 12-bit output bus. CS and RD must be
held LOW for at least 25ns following BUSY HIGH. Data
will be valid 30ns after the falling edge of both CS and RD.
The output data will remain valid for 20ns following the
rising edge of both CS and RD. See Figure 2 for the read
cycle timing diagram.
FIGURE 2. ADS7852 Write/Read Timing.
DIGITAL OUTPUT
STRAIGHT BINARY
DESCRIPTION
ANALOG INPUT
BINARY CODE
HEX CODE
Least Significant
Bit (LSB)
Full Scale
Midscale
Midscale –1LSB
Zero Full Scale
1.2207mV
4.99878V
2.5V
2.49878V
0V
1111 1111 1111
1000 0000 0000
0111 1111 1111
0000 0000 0000
FFF
800
7FF
000
Table I. Ideal Input Voltages and Output Codes.
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
CONV
t
ACQ
t
CKP
t
CKL
t
CKH
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
t
14
t
15
Conversion Time
Acquisition Time
Clock Period
Clock LOW
Clock HIGH
1.75
0.25
5000
μ
s
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
125
40
40
35
20
20
25
20
25
5
5
30
5
0
0
10
0
50
WR LOW Prior to Rising Edge of CLK
WR LOW After Rising Edge of CLK
CS LOW After Rising Edge of CLK
CS and RD HIGH
BUSY Delay After CS LOW
RD LOW
Address Hold Time
Address Setup Time
Bus Access Time
Bus Relinquish Time
CS to RD Setup Time
RD to CS Hold Time
CLK LOW to BUSY HIGH
BUSY to RD Delay
RD HIGH to CLK LOW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
CLK
HOLD
WR
CS
BUSY
RD
Address
Bus
Data
Bus
t
CKH
t
CKL
t
2
t
4
t
4
t
1
t
3
t
CONV
t
ACQ
t
CKP
Conversion n
Address n + 1
Address n + 2
Conversion n + 1
Hi-Z
Hi-Z
Hi-Z
Data
Valid
Data
Valid
t
5
t
10
t
6
t
8
t
7
t
9
相關(guān)PDF資料
PDF描述
ADS7861 CMOS 8-Stage Presettable 8-Bit Binary Synchronous Down Counter 16-CDIP -55 to 125
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS7852Y/250 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8-Channel Parallel Output RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7852Y/250G4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8-Channel Parallel Output RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7852Y/2K 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8-Channel Parallel Output RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7852Y/2KG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8-Channel Parallel Output RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7852YB 制造商:Texas Instruments 功能描述:12BIT ADC PARALLEL O/P SMD 7852
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