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參數(shù)資料
| 型號(hào)： | ADS7833N |
| 英文描述： | 10-Channel, 12-Bit DATA ACQUISITION SYSTEM |
| 中文描述： | 10通道，12位數(shù)據(jù)采集系統(tǒng) |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 150K |
| 代理商： | ADS7833N |
ADS7833
8
MULTIPLEXERS
The ADS7833 also contains several multiplexers that are
used to select the desired analog inputs and connect the
proper sample hold outputs to the PGAs and ADCs. The
MUXs are driven by a decoder which receives its inputs
from the Input Setup Register. (See Table III and Table IV
for information on input channel selection). The input mul-
tiplexers can take full differential input signals (see Figure 3
and Table VII). The analog signals stay differential through
the sample holds and the PGAs all the way to the inputs of
the ADSs. This is done to provide the best possible high
frequency noise rejection.
INPUT SETUP
As the ADCs are converting and transmitted their serial
digital data for one conversion cycle, a setup word is being
received to be used for the next conversion cycle. The 13-bit
word is supplied at the SER
IN
pin (see Figure 1), and is
stored in the buffered Input Setup Register. The Input Select
and Gain Select portions of the word are decoded and
determine the state of the multiplexers and PGAs (see CON-
FIGURABLE PARAMETERS section).
DIGITAL-TO-ANALOG CONVERTER
An 8-bit DAC provides 256 output voltage levels from 0V
to 2.5V (see Table V for input/output relationships). The
DAC is controlled by the DAC Input portion of the input
setup word. The DAC Input portion of the word is strobed
into the DAC at the end of the conversion cycle (14th CLK
pulse in Figure 2).
VOLTAGE REFERENCE
The ADS7833 contains an internal 2.5V voltage reference.
It is available externally through an output buffer amplifier.
If it is desired to use an external reference, one may be
connected at the REF
IN
pins. This then overrides the internal
2.5V reference, is connected to the ADCs and is available
buffered at the CAP pin.
OTHER DIGITAL INPUTS AND OUTPUTS
Sampling and conversion is controlled by the CONV input
(see Figure 2). The ADS7833 is designed to operate from an
external clock supplied at the CLK input. This allows the
conversion to be done synchronously with system timing so
that transient noise effects can be minimized. The CLK
signal may run continuously or may be supplied only during
convert sequences. The BUSY and DCLOCK signals are
internally generated and are supplied to make interfaces with
microprocessors easier (see Figures 2, 4, and 6).
CONFIGURABLE PARAMETERS
Configurable parameters are:
PGA Gain
Input multiplexer and sample/hold selection
DAC output voltage
Configuration information for these parameters is contained
in the SER
IN
word (See Figure 2). As one conversion is
taking place, the configuration for the next conversion is
being loaded into the buffered Input Setup Register via the
SER
IN
word. Table I shows information regarding these
parameters.
CLOCK
POSITIONS
(1)
DESCRIPTION
FUNCTIONS
2-9
DAC Input
0-7
Gain Select
0-1
Input Select
0-2
Sets DAC Output Voltage
10-11
Sets PGA Gains
12-14
Determines Multiplexers
Conditions
NOTE: (1) See Figure 2. “Clock Pulse Reference No.”
TABLE I. Description of Configurable Parameters.
FIGURE 2. Timing Diagram.
CLK (Input)
CONV (Input)
SAMPLE (Internal)
BUSY (Output)
DAC Input 0-7
1
14
1
2
t
CONV
7
6
5
4
3
2
1
0
1
0
2
1
0
Gain
Select 0-1
Input
Select 0-2
SERIAL OUT
1
SER
IN
How Used
NOTE: (1) See the specification table for timing specifications. (2) 50% duty cycle.
Clock Pulse
Reference No.
CLOCK AND
CONTROL SIGNALS
(1)
DCLOCK (Output)
A-to-D
CONVERTER OUTPUTS
CONTROL WORD INPUT
SERIAL OUT
2
SERIAL OUT
3
Bit 0
MSB
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10 Bit 11
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10 Bit 11 Bit 12
Bit 0
MSB
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10 Bit 11
Bit 0
MSB
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10 Bit 11
LSB
LSB
LSB
2
3
4
5
6
7
8
9
10
11
12
13
t
1
t
2
t
5
t
3
t
4
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7834 | 制造商:BB 制造商全稱:BB 功能描述:12-Bit High Speed Low Power Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7834_13 | 制造商:BB 制造商全稱:BB 功能描述:12-Bit High-Speed, Low-Power Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7834E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADS7834E/250 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit High Speed Low Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7834E/250G4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit High Speed Low Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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