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參數(shù)資料
| 型號： | ADS5240IPAP |
| 元件分類： | ADC |
| 英文描述： | 4-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface |
| 中文描述： | 4通道，12位，40MSPS的ADC的串行LVDS接口 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 418K |
| 代理商： | ADS5240IPAP |
www.ti.com
15
IN
1.5pF
SP
SP
SP
(defines sampling instant)
INCM
(internallygenerated voltage)
INCM
4pF
Sample
15
IN+
1.5pF
1.7pF
4pF
Sample
INPUT OVER-VOLTAGE RECOVERY
The differential full-scale input peak-to-peak sup-
ported by the ADS5240 is 2V. For a nominal value of
V
CM
(1.5V), IN
P
and IN
N
can swing from 1V to 2V.
The ADS5240 is specially designed to handle an
over-voltage differential peak-to-peak voltage of 4V
(2.5V and 0.5V swings on IN
P
and IN
N
). If the input
common-mode is not considerably off from V
CM
during overload (less than 300mV), recovery from an
over-voltage input condition is expected to be within 4
clock cycles. All of the amplifiers in the SHA and ADC
are specially designed for excellent recovery from an
overload signal.
REF
T
V
CM
REF
B
I
SET
0.1
μ
F
2.2
μ
F
2
2
2.2
μ
F
0.1
μ
F
56.2k
ADS5240
+
+
REFERENCE CIRCUIT DESIGN
The digital beam-forming algorithm relies on gain
matching across all receiver channels. (A typical
system would have about 128 ADCs on the board.) In
such a case, it is critical to ensure that the gain is
matched, essentially requiring the reference voltages
seen by all the ADCs to be the same. Matching
references within the four channels of a chip is done
by using a single internal reference voltage buffer.
Trimming the reference voltages on each chip during
production
ensures
the
well-matched across different chips.
CLOCKING
The four channels on the chip run off a single ADCLK
input. To ensure that the aperture delay and jitter are
same for all the channels, a clock tree network is
used to generate individual sampling clocks to each
channel. The clock paths for all the channels are
matched from the source point all the way to the
sample-and-hold. This ensures that the performance
and timing for all the channels are identical. The use
ADS5240
SBAS326C–JUNE 2004–REVISED DECEMBER 2004
thereby scales down the device operating power.
However, it is recommended that the external resistor
be within 10% of the specified value of 56.2k
so
that the internal bias margins for the various blocks
are proper.
Buffering the internal bandgap voltage also generates
a voltage called V
CM
, which is set to the midlevel of
REF
T
and REF
B
, and is accessible on a pin. The
internal buffer driving V
has a drive of
±
2mA. It is
meant as a reference voltage to derive the input
common-mode in case the input is directly coupled.
When using the internal reference mode, a resistor of
2
should be added between the reference pins
(REF
T
and REF
B
) and the decoupling capacitor, as
shown in Figure 16.
Figure 15. Input Circuitry
Figure 16. Internal Reference Mode
The device also supports the use of external refer-
ence voltages. This mode involves forcing REF
T
and
REF
externally. In this mode, the internal reference
buffer is tri-stated. Since the switching current for the
four ADCs come from the externally-forced refer-
ences, it is possible for the performance to be slightly
less than when the internal references are used. It
should be noted that in this mode, V
CM
and ISET
continue to be generated from the internal bandgap
voltage, as in the internal reference mode. It is
therefore important to ensure that the common-mode
voltage of the externally-forced reference voltages
matches to within 50mV of V
CM
.
reference
voltages
are
All bias currents required for the internal operation of
the device are set using an external resistor to
ground at pin I
SET
. Using a 56.2k
resistor on I
SET
generates an internal reference current of 20μA. This
current is mirrored internally to generate the bias
current for the internal blocks. Using a larger external
resistor at I
SET
reduces the reference bias current and
18
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| ADS5240IPAPG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 12-bit 40MSPS w/Ser LVDS Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS5240IPAPT | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 12-bit 40MSPS w/Ser LVDS Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS5240IPAPTG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 12-bit 40MSPS w/Ser LVDS Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS5242 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:4-Channel, 12-Bit, 65MSPS Analog-to-Digital Converter with Serial LVDS Interface |
| ADS5242EVM | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADS5242 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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