參數(shù)資料
型號(hào): ADS1256IDBT
英文描述: Very Low Noise, 24-Bit Analog-to-Digital Converter
中文描述: 極低噪聲,24位模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 35/39頁
文件大?。?/td> 427K
代理商: ADS1256IDBT
SBAS288D JUNE 2003 REVISED AUGUST 2004
www.ti.com
35
RDATAC: Read Data Continuous
Description:
Issue command after DRDY goes low to enter the Read Data Continuous mode. This mode enables the
continuous output of new data on each DRDY without the need to issue subsequent read commands. After all 24 bits have
been read, DRDY goes high. It is not necessary to read back all 24 bits, but DRDY will then not return high until new data
is being updated. This mode may be terminated by the Stop Read Data Continuous command (STOPC). Because DIN
is constantly being monitored during the Read Data Continuous mode for the STOPC or RESET command, do not use
this mode if DIN and DOUT are connected together. See the Timing Characteristics for the required delay between the end
of the RDATAC command and the beginning of shifting data on DOUT: t
6
.
DOUT
DIN
24 Bits
DRDY
24 Bits
0000 0011
t
6
Figure 30. RDATAC Command Sequence
On the following DRDY, shift out data by applying SCLKs. The Read Data Continuous mode terminates if input_data equals
the STOPC or RESET command in any of the three bytes on DIN.
DOUT
DIN
DRDY
input_data
input_data
input_data
MSB
MidByte
LSB
Figure 31. DIN and DOUT Command Sequence During Read Continuous Mode
STOPC: Stop Read Data Continuous
Description:
Ends the continuous data output mode. (see RDATAC). The command must be issued after DRDY goes low
and completed before DRDY goes high.
DIN
DRDY
000 1111
Figure 32. STOPC Command Sequence
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