參數(shù)資料
型號: ADS1226IRGVR
廠商: Analog Devices, Inc.
英文描述: 24-Bit Analog-to-Digital Converter with One- and Two-Channel Differential Inputs and Internal Oscillator
中文描述: 24位模擬數(shù)字轉換器與單和雙通道差分輸入和內(nèi)部振蕩器
文件頁數(shù): 14/24頁
文件大?。?/td> 398K
代理商: ADS1226IRGVR
www.ti.com
V
REF
2
23
1
DATA FORMAT
The ADS1225 and ADS1226 output 24 bits of data in
binary two's complement format. The least significant
bit (LSB) has a weight of (V
REF
)/(2
23
– 1). The positive
full-scale input produces an output code of 7FFFFFh
and the negative full-scale input produces an output
code of 800000h. The output clips at these codes for
signals exceeding full-scale.
Table 4
summarizes the
ideal output codes for different input signals.
V
REF
2
23
1
V
REF
2
23
2
23
1
DRDY/DOUT
START
ADS1225/6
Status
SCLK held low in this example.
Data Ready
Data Ready
Converting
Converting
Converting
Converting
ADS1225
ADS1226
SBAS346–MAY 2006
Table 4. Ideal Output Code vs Input Signal
The ADS1225 and ADS1226 can be configured to
continuously convert by holding the START pin high
as shown in
Figure 27
. With START held high, a new
conversion starts immediately after the previous
conversion completes. This configuration continues
until the START pin is taken low.
Input Signal V
IN
(AINP - AINN)
+V
REF
IDEAL OUTPUT CODE
(
(1)
)
7FFFFFh
000001h
0
000000h
FFFFFFh
800000h
(1)
Excludes effects of noise, INL, offset, and gain errors.
Figure 27. Conversion with the START Pin Tied High
14
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