參數(shù)資料
型號： ADRF6704ACPZ
廠商： ANALOG DEVICES INC
元件分類： 調(diào)制器/解調(diào)器
英文描述： 2500 MHz - 2900 MHz RF/MICROWAVE I/Q MODULATOR
封裝： 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP_VQ, CP-40-1, 40 PIN
文件頁數(shù)： 6/18頁
文件大?。?/td> 581K
代理商： ADRF6704ACPZ
ADRF6704
Preliminary Technical Data
CPC1
CPC0
Charge
Pump
Control
0
Both On
0
1
Pump Down
1
0
P
ump
U
p
1
Tristate (default)
CPS
Charge Pump
Control Source
0
Control Based On State of DB7/DB8 (CP Control)
1
Control from PFD (default)
CPM
Charge Pump
Current Reference
Source
0
Internal (default)
1
External
RS1
RS0
Input Reference
Path Source
0
2X Reference Input
0
1
Reference Input (default)
1
0
0.5X Reference Input
1
0.25X Reference Input
Ch
a
rg
e
P
u
m
p
Re
fe
re
nc
e
PF
D
P
h
as
e
O
ff
s
e
tP
o
la
ri
ty
C
h
ar
ge
P
u
m
p
C
ont
ro
lS
ou
rc
e
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
RMS2
RMS1
RMS0
RS1
RS0
CPM
CPBD
CPB4
CPB3
CPB2
CPB1
CPB0
CPP1
CPP0
CPS
CPC1
CPC0
PE1
PE0
PAB1
PAB0
Input
Reference
Path Source
Output Mux Source
PFD Anti
Backlash
Delay
PFD Edge
Sensitivity
Charge
Pump
Control
Charge
Pump
Current
Multiplier
PFD Phase Offset Multiplier Value
PAB1
PAB0
PFD
Anti-Backlash
Delay
0
0nsec (default, recommended)
0
1
0.5nsec
1
0
0.75nsec
1
0.9nsec
CPB4
CPB3
CPB2
CPB1
CPB0
PFD Phase Offset Multiplier
0
0x22.5
°/I
CPMULT
0
1
1x22.5
°/I
CPMULT
'
' ' ' ' '
0
1
0
4x22.5
°/I
CPMULT (recommended)
'
' ' ' ' '
0
1
0
1
0
10x22.5°/ICPMULT (default)
'
' ' ' ' '
1
31x22.5
°/I
CPMULT
CPP1
CPP0
Charge Pump
Current Multiplier
0
1
0
1
2 (default, recommended)
1
0
3
1
4
CPBD
PFD Phase Offset Polarity
0
negative
1
positive (default, recommended)
PE1
Divider Path
Edge Sensitivity
0
Falling Edge (recommended)
1
Rising Edge (default)
PE0
Reference Path
Edge Sensitivity
0
Falling Edge
1
Rising Edge (default, recommended)
CPC1
CPC0
Charge
Pump
Control
0
Both On
0
1
Pump Down
1
0
P
ump
U
p
1
Tristate (default)
CPS
Charge Pump
Control Source
0
Control Based On State of DB7/DB8 (CP Control)
1
Control from PFD (default)
CPM
Charge Pump
Current Reference
Source
0
Internal (default)
1
External
RS1
RS0
Input Reference
Path Source
0
2X Reference Input
0
1
Reference Input (default)
1
0
0.5X Reference Input
1
0.25X Reference Input
Ch
a
rg
e
P
u
m
p
Re
fe
re
nc
e
PF
D
P
h
as
e
O
ff
s
e
tP
o
la
ri
ty
C
h
ar
ge
P
u
m
p
C
ont
ro
lS
ou
rc
e
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
RMS2
RMS1
RMS0
RS1
RS0
CPM
CPBD
CPB4
CPB3
CPB2
CPB1
CPB0
CPP1
CPP0
CPS
CPC1
CPC0
PE1
PE0
PAB1
PAB0
C3(1)
C2(0)
C1(0)
Input
Reference
Path Source
Output Mux Source
Control Bits
PFD Anti
Backlash
Delay
PFD Edge
Sensitivity
Charge
Pump
Control
Charge
Pump
Current
Multiplier
PFD Phase Offset Multiplier Value
PAB1
PAB0
PFD
Anti-Backlash
Delay
0
0nsec (default, recommended)
0
1
0.5nsec
1
0
0.75nsec
1
0.9nsec
CPB4
CPB3
CPB2
CPB1 CPB0
PFD Phase Offset Multiplier
0
0x22.5
°/I
CPMULT
0
1
1x22.5
°/I
CPMULT
'
' ' ' ' '
0
1
0
4x22.5
°/I
CPMULT (recommended)
'
' ' ' ' '
0
1
0
1
0
10x22.5°/ICPMULT (default)
'
' ' ' ' '
1
31x22.5
°/I
CPMULT
CPP1
CPP0
Charge Pump
Current Multiplier
0
1
0
1
2 (default, recommended)
1
0
3
1
4
CPBD
PFD Phase Offset Polarity
0
negative
1
positive (default, recommended)
PE1
Divider Path
Edge Sensitivity
0
Falling Edge (recommended)
1
Rising Edge (default)
PE0
Reference Path
Edge Sensitivity
0
Falling Edge
1
Rising Edge (default, recommended)
RM
RMS
S2
2
RMS
RMS1
1
RM
RMS
S0
0
Ou
Outtp
put
ut M
Mu
ux
x
So
Sou
urrc
ce
e
0
Lo
Loc
ck
k D
De
ette
ect
ct ((d
def
efau
aulltt))
0
1
V
V P
PT
TA
AT
T
0
1
0
B
Bu
uffffe
erred
ed V
Ve
errs
sio
ion
n o
off R
Re
efe
ferre
en
nc
ce
e In
Inpu
putt
0
1
B
Bu
uff
ffere
ered
d V
Ve
errs
siio
on
n o
off 0.
0.5X
5X R
Re
effe
erre
en
nc
ce I
e In
npu
putt
1
0
B
Bu
uff
ffere
ered
d V
Ve
errs
siio
on
n o
off 2X
2X R
Re
effe
erre
en
nc
ce I
e In
npu
putt
1
0
1
T
Trriis
sta
tate
te
1
0
B
Bu
uffffer
ere
ed
d ve
verrs
siio
on
n o
off 0.
0.25
25x
xF
Frre
eff
1
R
Re
ese
serrv
ve
ed
d ((d
do no
o nott use
use))
Figure 9. Charge Pump, PFD, and Reference Path Control Register (R4)
Rev. PrE | Page 14 of 18
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