參數(shù)資料
型號(hào): ADP3808JCPZ-RL
廠商: ANALOG DEVICES INC
元件分類: 穩(wěn)壓器
英文描述: High Efficiency Switch Mode Li-Ion Battery Charger
中文描述: BATTERY CHARGE CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, QCC24
封裝: ROHS COMPLIANT, MO-220VGGD-2, LFCSP-24
文件頁(yè)數(shù): 13/16頁(yè)
文件大?。?/td> 315K
代理商: ADP3808JCPZ-RL
ADP3808
LIMIT
The LIMIT pin is an open-drain output that signals when the
voltage at ISYS exceeds the voltage at LIMSET. The internal
comparator produces the function shown in Figure 10. This is
a graph of V
LIMIT
vs. V
ISYS
where LIMSET is set to 1.5 V. The
LIMIT pin should be pulled up to a maximum of 6 V through a
resistor. When ISYS is below LIMSET, the LIMIT pin has high
output impedance. The open-drain output is capable of sinking
700 μA when the threshold is exceeded. This comparator is
turned off during shutdown to conserve power.
AC ADAPTOR DETECTION
The EXTPWR pin on the ADP3808 is an open-drain active low
output used to signal that an ac adaptor is connected. If the
ISYS voltage level is greater than 1 V or the SYSP sense pin
voltage is greater then 18.25 V, the EXTPWR pin is driven low.
A pull-up resistor must be connected when this function is
required. The maximum pull-up voltage is 6 V.
EN
A high impedance CMOS logic input is provided to turn off the
ADP3808. When the voltage on EN is less than 0.8 V, the
ADP3808 is placed in low power shutdown. With the exception
of the system current sense amplifier, AMP2, all other circuitry
is turned off. The reference and regulators are pulled to ground
during shutdown and all switching is stopped. During this state,
the supply current is less than 5 A. In addition, the BAT, CSP,
CSM, and SW pins go to high impedance to minimize current
drain from the battery.
Rev. 0 | Page 13 of 16
UVLO
Undervoltage lock-out, UVLO, is included in the ADP3808 to
ensure proper startup. As V
CC
rises above 1 V, the regulator
tracks V
CC
until it reaches its final voltage. However, the rest of
the circuitry is held off by the UVLO comparator. The UVLO
comparator monitors the regulator to ensure that it is above 5 V
before turning on the main charger circuitry. This occurs when
V
CC
reaches 9.5 V Monitoring the regulator outputs makes sure
that the charger circuitry and driver stage have sufficient
voltage to operate normally. The UVLO comparator includes
600 mV of hysteresis to prevent oscillations near the threshold.
LOOP FEED FORWARD
As the startup sequence discussion shows, the response time at
COMP is slowed by the large compensation capacitor. To speed
up the response, two comparators can quickly feed forward
around the normal control loop and pull the COMP node down
to limit any overshoot in either short-circuit or overvoltage
conditions. The overvoltage comparator has a trip point set to
35% higher than the final battery voltage. The overcurrent
comparator threshold is set to 100 mV across the CS pins.
When these comparators are tripped, a normal soft start
sequence is initiated. The overvoltage comparator is valuable
when the battery is removed during charging. In this case, the
current in the inductor causes the output voltage to spike up,
and the comparator limits the maximum voltage. Neither of
these comparators affects the loop under normal charging
conditions.
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