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參數(shù)資料
| 型號： | ADP3418KRZ1 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual Bootstrapped 12 V MOSFET Driver with Output Disable |
| 中文描述： | 12伏雙自舉MOSFET驅(qū)動器與輸出禁用 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 323K |
| 代理商： | ADP3418KRZ1 |
ADP3418
SPECIFICATIONS
1
VCC = 12 V, BST = 4 V to 26 V, T
A
= 0°C to 85°C, unless otherwise noted.
Table 1.
Parameter
SUPPLY
Supply Voltage Range
Supply Current
OD INPUT
Input Voltage High
Input Voltage Low
Input Current
Propagation Delay Time
PWM INPUT
Input Voltage High
Input Voltage Low
Input Current
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
Rev. B | Page 3 of 16
Symbol
V
CC
I
SYS
t
pdhOD
t
pdlOD
t
rDRVH
Conditions
BST = 12 V, IN = 0 V
See Figure 3
See Figure 3
V
BST
V
SW
= 12 V
V
BST
V
SW
= 12 V
See Figure 4, V
BST
V
SW
= 12 V,
C
LOAD
= 3 nF
See Figure 4, V
BST
V
SW
= 12 V,
C
LOAD
= 3 nF
See Figure 4, V
BST
V
SW
= 12 V
V
BST
V
SW
= 12 V
See Figure 4, C
LOAD
= 3 nF
See Figure 4, C
LOAD
= 3 nF
See Figure 4
See Figure 4
SW = 5 V
SW = PGND
Min
4.15
2.6
–1
3.0
–1
Typ
3
25
20
1.8
1.0
35
Max
13.2
6
0.8
+1
40
40
0.8
+1
3.0
2.5
45
Unit
V
mA
V
V
μA
ns
ns
V
V
μA
ns
t
fDRVH
20
30
ns
Propagation Delay
2
t
pdhDRVH
t
pdlDRVH
t
rDRVL
t
fDRVL
t
pdhDRVL
t
pdlDRVL
90
40
20
1.8
1.0
25
21
30
10
240
120
65
35
3.0
2.5
35
30
60
20
ns
ns
ns
ns
ns
ns
ns
ns
LOW-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
Propagation Delay
2
Timeout Delay
1
All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).
2
For propagation delays, t
pdh
refers to the specified signal going high, and t
pdl
refers to it going low.
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