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參數(shù)資料
| 型號(hào)： | ADP1110 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Micropower, Step-Up/Step-Down Switching Regulator(微功耗,可調(diào)/固定輸出,步升/步降開關(guān)穩(wěn)壓器) |
| 中文描述： | 微功耗，降壓型開關(guān)穩(wěn)壓器（微功耗，可調(diào)/固定輸出，步升/步降開關(guān)穩(wěn)壓器） |
| 文件頁數(shù)： | 12/16頁 |
| 文件大小： | 370K |
| 代理商： | ADP1110 |
ADP1110
–12–
REV. 0
The internal structure of the I
LIM
circuit is shown in Figure 27.
Q1 is the ADP1110’s internal power switch, that is paralleled by
sense transistor Q2. The relative sizes of Q1 and Q2 are scaled
so that I
Q2
is 0.5% of I
Q1
. Current flows to Q2 through an
internal 80
resistor and through the R
LIM
resistor. These two
resistors parallel the base-emitter junction of the oscillator-
disable transistor, Q3. When the voltage across R1 and R
LIM
exceeds 0.6 V, Q3 turns on and terminates the output pulse. If
only the 80
internal resistor is used (i.e., the I
LIM
pin is
connected directly to V
IN
), the maximum switch current will be
1.5 A. Figure 6 gives R
LIM
values for lower current-limit values.
72kHz
OSC
V
IN
POWER
SWITCH
SW2
SW1
R
DRIVER
80
(INTERNAL)
I
LIM
IQ1
200
Q2
V
IN
(EXTERNAL)
ADP1110
R1
Q3
Q1
Figure 27. ADP1110 Current Limit Operation
The delay through the current limiting circuit is approximately
800 ns. If the switch ON time is reduced to less than 3
μ
s,
accuracy of the current trip-point is reduced. Attempting to
program a switch ON time of 800 ns or less will produce
spurious responses in the switch ON time; however, the
ADP1110 will still provide a properly-regulated output voltage.
PROGRAMMING THE GAIN BLOCK
The gain block of the ADP1110 can be used as a low-battery
detector, error amplifier or linear post regulator. The gain block
consists of an op amp with PNP inputs and an open-collector
NPN output. The inverting input is internally connected to the
ADP1110’s 220 mV reference, while the noninverting input is
available at the SET pin. The NPN output transistor will sink
about 300
μ
A.
Figure 28 shows the gain block configured as a low-battery
monitor. Resistors R1 and R2 should be set to high values to
reduce quiescent current, but not so high that bias current in
the SET input causes large errors. A value of 33 k
for R2 is a
good compromise. The value for R1 is then calculated from the
formula:
R
1
=
V
LOBATT
–220
mV
220
mV
R
2
where
V
LOBATT
is the desired low battery trip point. Since the
gain block output is an open-collector NPN, a pull-up resistor
should be connected to the positive logic power supply.
ADP1110
220V
V
REF
GND
AO
R
L
R1
V
BAT
SET
R2
33k
R
HYS
V
LOGIC
Figure 28. Setting the Low Battery Detector Trip Point
The circuit of Figure 28 may produce multiple pulses when
approaching the trip point due to noise coupled into the SET
input. To prevent multiple interrupts to the digital logic,
hysteresis can be added to the circuit. Resistor R
HYS
, with a
value of 1 M
to 10 M
, provides the hysteresis. The addition
of R
HYS
will change the trip point slightly, so the new value for
R1 will be:
R
1
=
V
LOBATT
–220
mV
220
mV
R
2
–
V
L
–220
mV
R
L
+
R
HYS
where
V
L
is the logic power supply voltage,
R
L
is the pull-up
resistor, and R
HYS
creates the hysteresis.
The gain block can also be used as a control element to reduce
output ripple. The ADP3000 is normally recommended for low-
ripple applications, but its minimum input voltage is 2 V. The
gain-block technique using the ADP1110 can be useful for step-
up converters operating down to 1 V.
A step-up converter using this technique is shown in Figure 29.
This configuration uses the gain block to sense the output
voltage and control the comparator. The result is that the
comparator hysteresis is reduced by the open loop gain of the
gain block. Output ripple can be reduced to only a few millivolts
with this technique, versus a typical value of 90 mV for a +5 V
converter using just the comparator. For best results, a large
output capacitor (1000
μ
F or more) should be specified. This
technique can also be used for step-down or inverting applica-
tions, but the ADP3000 is usually a more appropriate choice.
See the ADP3000 data sheet for further details.
I
LIM
ADP1110
V
IN
SW1
SW2
4
FB GND
8
SET
AO
6
L1
C
1000μF
R1
R2
OUTPUT
C
INPUT
10μF
INPUT
7
1
2
5
3
300k
13.8k
270k
D1
CTX15-4
1N5818
15μH
Figure 29. Using the Gain Block to Reduce Output Ripple
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP1110AN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADP1110AN-12 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADP1110AN-3.3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADP1110AN-33 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Micropower, Step-Up/Step-Down Switching Regulator; Adjustable and Fixed 3.3 V, 5 V, 12 V |
| ADP1110AN-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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