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| 型號(hào)： | ADM1345 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Single Supply V.35 Transceiver(單電源RS-422/RS-485收發(fā)器,可發(fā)送和接收差分時(shí)鐘和數(shù)據(jù)信號(hào)) |
| 中文描述： | 單電源.35收發(fā)器（單電源RS-422/RS-485收發(fā)器，可發(fā)送和接收差分時(shí)鐘和數(shù)據(jù)信號(hào)） |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 338K |
| 代理商： | ADM1345 |
Preliminary Technical Information
ADM1345
REV. A
7
CIRCUIT DESCRIPTION
The ADM1345 contains three transmitters with TTL/
CMOS-compatible inputs and complementaryl current-
source outputs, three receivers with differential inputs and
TTL/CMOS-compatible outputs, and an inverting charge
pump to provide a negative supply rail (V
EE
).
TRANSMITTER OUTPUTS
The internal CMOS logic of the transmitter controls an
output stage consisting of switched complementary current
sources, as shown in figure 15.
50
W
50
W
125
W
11mA
11mA
Y#
Z#
T#
CHIP
EXTERNAL
TERMINATOR
V
CC
V
EE
Figure 15. Transmitter Equivalent Output Circuit
With a logic zero at the transmitter input, the inverting output
Z sources 11mA (positive current flows out of the pin) and the
non-inverting output Y sinks 11mA (positive current flows into
the pin). With a logic 1 at the transmitter input, the converse is
true, Z sinks 11mA and Y sources 11mA.
The differential transmitter output voltage is set by the
termination resistors. With both transmitter and receiver
terminated with differential 50
resistors, the output
voltage is set to (50
x 11mA) = 550mV.
If the transmitter and receiver grounds are at the same
potential, then the output voltages of the transmitter will be
symmetrical above and below zero and there will be no
common-mode voltage ( assuming that the current sources
and 50
resistors are matched). However, the transmitter
outputs have a common-mode range of ±2V, which allows
for a ground difference between transmitter and receiver of
±4V. In this case, a common-mode current will flow in the
125
resistors. More information on terminating resistors is
given in the Applications Information section.
RECEIVER INPUTS
All receiver inputs have a 30k
resistance to ground and
require additional, external terminating resistors. Receivers
feature hysteresis of 50mV to improve noise immunity. The
receivers have a common Output Enable (OE) pin, which
enables the receiver outputs when low and puts the receiver
outputs into a high impedance state when high. OE should
be held low for normal operation.
SELECT INPUTS
The ADM1345 can be configured by two select inputs,
which may be hardwired or under software control. Using
these two inputs, four modes can be selected, as shown in
the following truth table.
Table I. Transmitter and Receiver Configuration
S1 S2 Condition
0
0 Shutdown Mode, all transmitters and receivers inactive
0
1 All receivers active, TX3 shut down (DTE Mode)
1
0 All transmitters active, RX3 shut down (DCE Mode)
1
1 All transmitters and receivers active
In the DTE mode, the output of the shut-down transmitter
(TX3) assumes a high-impedance state. In the DCE mode,
the output of the shut-down receiver (RX3) assumes a high
impedance state.
In the shutdown mode (S1 and S2 low) the charge pump is
switched off, V
EE
is clamped to ground, and all transmitter
and receiver outputs assume a high impedance state.
Truth tables for the various transmitter and receiver input
conditions are given below.
Table II. Transmitter Truth Table
Inputs
S1 S2 T
Outputs
Z1 & Z2
Configuration
Y1 & Y2
Y3 Z3
DTE
0
1
0
0
1
Z
Z
DTE
0
1
1
1
0
Z
Z
DCE or all ON
1
X
0
0
1
0
1
DCE or all ON
1
X
1
1
0
1
0
Shutdown
0
0
X
Z
Z
Z
Z
Table III. Receiver Truth Table
Inputs
S1 S2 OE
Outputs
R1 & R2
Configuration
B-A
R3
DTE or all ON
X
1
0
≥
0.2V
≤
-0.2V
≥
0.2V
≤
-0.2V
1
1
DTE or all ON
X
1
0
0
0
DCE
1
0
0
1
Z
DCE
1
0
0
0
Z
Disabled
X
X
1
X
Z
Z
Shutdown
0
0
X
X
Z
Z
Z = high impedance
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