參數(shù)資料
型號(hào): ADM1345
廠商: Analog Devices, Inc.
英文描述: Single Supply V.35 Transceiver(單電源RS-422/RS-485收發(fā)器,可發(fā)送和接收差分時(shí)鐘和數(shù)據(jù)信號(hào))
中文描述: 單電源.35收發(fā)器(單電源RS-422/RS-485收發(fā)器,可發(fā)送和接收差分時(shí)鐘和數(shù)據(jù)信號(hào))
文件頁(yè)數(shù): 2/10頁(yè)
文件大?。?/td> 338K
代理商: ADM1345
ADM1345
Preliminary Technical Information
REV. A
2
ADM1345SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
Transmitter Differential Output Voltage, V
OD
Transmitter Common-Mode Output Voltage, V
OC
-0.6
TransmitterOutputHighCurrent, I
OH
Transmitter Output Low Current, I
OL
Transmitter Output Leakage Current, I
OZ
0.44
0.55
0
-11
11
+1
0.66
0.6
-9.4
12.6
+100
V
V
mA
mA
μA
Figure 2, -4V
V
OS
4V
Figure 2, V
OS
= 0V
V
Y, Z
= 0V
V
Y, Z
= 0V
Sl = S2 = 0V, -5V
V
Y,Z
5V
-12.6
9.4
Transmitter Output Impedance, R
O
100
k
-2V
V
Y, Z
2V
Differential Receiver Input Threshold Voltage, V
TH
Receiver Input Hysteresis,
V
TH
Receiver Input Current (A, B), I
IN
Receiver Input Impedance, R
IN
Receiver Output High Voltage, V
OH
Receiver Output Low Voltage, V
OL
Receiver Output Short-Circuit Current, I
OSR
Receiver Three-State Output Current, I
OZR
25
200
mV
mA
k
V
V
mA
μ
A
mV
-7V
(V
A
+ V
B
)/2
7V
-7V
V
A, B
7V
-7V
V
A, B
7V
I
O
= 4mA, V
B, A
= 0.2V
I
O
= 4mA, V
B, A
= -0.2V
0V < V
O
< V
CC
S1 = S2 = 0V, 0V
V
O
V
CC
-7V
(V
A
+ V
B
)/2
7V
50
0.4
17.5
3
30
4.5
0.2
0.4
85
±10
7
Logic Input High Voltage, V
INH
Logic Input Low Voltage, V
INL
Logic Input Current, I
IN
2
V
V
μ
A
Transmitter Inputs, S1, S2, OE
Transmitter Inputs, S1, S2, OE
Transmitter Inputs, S1, S2, OE
0.8
±10
V
CC
Supply Current, I
CC
118
19
1
170
30
100
mA
mA
μ
A
Figure 2, V
OS
= 0, S1 = S2 = HIGH
No Load, S1 = S2 = HIGH
Shutdown, S1 = S2 = 0V
Generated Negative Supply Voltage, V
EE
-5.5
V
No Load, S1 = S2 = HIGH
Transmitter Rise or Fall Time, t
r
, t
f
Transmitter Input to Output Propagation Delay,
Low to High, t
PLH
Transmitter Input to Output Propagation Delay,
High to Low, t
PHL
Transmitter Output to Output Skew, t
SKEW
7
25
40
70
ns
ns
Figures 2 and 4, V
OS
= 0V
Figures 2 and 4, V
OS
= 0V
25
70
ns
Figures 2 and 4, V
OS
= 0V
0
ns
Figures 2 and 4, V
OS
= 0V
Receiver Input to Output Propagation Delay,
Low to High, t
PLH
Receiver Input to Output Propagation Delay,
High to Low, t
PHL
Differential Receiver Skew, (t
SKEW
=
t
PLH
- t
PHL
)
Receiver Enable to Output LOW, t
ZL
Receiver Enable to Output HIGH, t
ZH
Receiver Disable From LOW, t
LZ
Receiver Disable From HIGH, t
HZ
49
100
ns
Figures 2 and 5, V
OS
= 0V
52
100
ns
Figures 2 and 5, V
OS
= 0V
3
40
35
30
35
ns
ns
ns
ns
ns
Figures 2 and 5, V
OS
= 0V
Figures 3 and 6, C
L
= 15pF
Figures 3 and 6, C
L
= 15pF
Figures 3 and 6, C
L
= 15pF
Figures 3 and 6, C
L
= 15pF
70
70
70
70
Charge Pump Oscillator Frequency, f
OSC
200
kHz
Maximum Data Rate, BR
MAX
(Note 3)
10
15
Mbaud
Notes
1.
All currents into device pins are termed positive; all currents out of device pins are termed negative. All voltages are referenced to device
ground unless otherwise specified.
2.
All typicals are given for Vcc = 5V, C1 = C2 = C3 = lμF ceramic capacitors and T
A
= 25°C.
3.
Maximum data rate is specified for NRZ data encoding scheme. The maximum data rate may be different for other data encoding schemes.
Data rate is guaranteed by correlation and is not tested.
(V
CC
= Full Operating Range, T
A
= T
MIN
to T
MAX
unless otherwise noted)
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