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| 型號： | ADM1065 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Super Sequencer-TM and Monitor |
| 中文描述： | 超音序器- TM和監(jiān)視器 |
| 文件頁數(shù)： | 6/28頁 |
| 文件大小： | 497K |
| 代理商： | ADM1065 |
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ADM1065
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 6 of 28
0
NC = NO CONNECT
ADM1065
TOP VIEW
(Not to Scale)
G
40
V
39
N
38
N
37
S
36
S
35
A
34
A
33
V
32
P
31
A
11
R
12
N
13
R
14
N
15
N
16
N
17
N
18
N
19
N
20
VX1
1
VX2
2
VX3
3
VX4
4
VX5
5
VP1
6
VP2
7
VP3
8
VP4
9
VH
10
PDO1
30
PDO2
29
PDO3
28
PDO4
27
PDO5
26
PDO6
25
PDO7
24
PDO8
23
PDO9
22
PDO10
21
PIN 1
Figure 3. LFCSP Pin Configuration
0
NC = NO CONNECT
N
48
G
47
V
46
N
45
N
44
S
43
S
42
A
41
A
40
V
39
P
38
N
37
N
13
A
14
R
15
N
16
R
17
N
18
N
19
N
20
N
21
N
22
N
23
N
24
NC
VX1
VX2
VX3
VX4
VX5
VP1
VP2
VP3
VP4
10
VH
11
NC
12
1
2
3
4
5
6
7
8
9
NC
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PDO9
PDO10
NC
36
35
34
33
32
31
30
29
28
27
26
25
ADM1065
TOP VIEW
(Not to Scale)
PIN 1
Figure 4. TQFP Pin Configuration
Table 2. Pin Function Descriptions
Pin No.
LFCSP
TQFP
13,
15-20,
37-38
36–37, 44-
45, 48
1–5
2–6
Mnemonic
NC
Description
No connection.
1, 12–13,
16, 18–25,
VX1–5
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to 1.375 V.
Alternatively, these pins can be used as general-purpose digital inputs.
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to these pins, the output of which connects to a supply
fault detector. These pins allow thresholds from 2.5 V to 6.0 V, 1.25 V to 3.00 V, and 0.573 V to 1.375 V.
High Voltage Input to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to this pin, the output of which connects to a supply
fault detector. This pin allows thresholds from 6.0 V to 14.4 V and 2.5 V to 6.0 V.
Ground Return for Input Attenuators.
Ground Return for On-Chip Reference Circuits.
2.048 V Reference Output.
Programmable Output Drivers.
Ground Return for Output Drivers.
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this pin
and GND.
Logic Input. This pin sets the seventh bit of the SMBus interface address.
Logic Input. This pin sets the sixth bit of the SMBus interface address.
SMBus Clock Pin. Open-drain output requires external resistive pull-up.
SMBus Data I/O Pin. Open-drain output requires external resistive pull-up.
Device Supply Voltage. Linearly regulated from the highest of the VP1–4, VH pins to a typical of 4.75 V.
Supply Ground.
6–9
7–10
VP1–4
10
11
VH
11
12
14
21–30
31
32
14
15
17
26–35
38
39
AGND
REFGND
REFOUT
PDO10–1
PDOGND
VCCP
33
34
35
36
39
40
40
41
42
43
46
47
A0
A1
SCL
SDA
VDDCAP
GND
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| ADM1065ACPZ | 功能描述:IC SEQUENCER/SUPERVISOR 40-LFCSP RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:Super Sequencer® 標準包裝:1 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復(fù)位:高有效 復(fù)位超時:- 電壓 - 閥值:1.8V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:6-TSOP（0.059"，1.50mm 寬）5 引線 供應(yīng)商設(shè)備封裝:5-TSOP 包裝:剪切帶 (CT) 其它名稱:NCP301HSN18T1GOSCT |
| ADM1065ASU | 制造商:AD 制造商全稱:Analog Devices 功能描述:Super Sequencer-TM and Monitor |
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