參數(shù)資料
型號(hào)： ADF4350BCPZ-RL
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 17/32頁(yè)
文件大?。?/td> 0K
描述： IC SYNTH PLL VCO FN/IN 32LFCSP
產(chǎn)品變化通告： ADF4350, ADF4905/6 N-counter Change 05/Mar/2012
設(shè)計(jì)資源： Broadband Low EVM Direct Conversion Transmitter (CN0134)
Broadband Low EVM Direct Conversion Transmitter Using LO Divide-by-2 Modulator (CN0144)
Using low noise linear drop-out regulators to power wideband PLL & VCO IC's (CN0147)
標(biāo)準(zhǔn)包裝： 5,000
類(lèi)型： 扇出配送，分?jǐn)?shù)-N，整數(shù)-N，時(shí)鐘/頻率合成器（RF）
PLL： 是
輸入： CMOS，TTL
輸出： 時(shí)鐘
電路數(shù)： 1
比率 - 輸入:輸出： 1:3
差分 - 輸入:輸出： 無(wú)/無(wú)
頻率 - 最大： 4.4GHz
除法器/乘法器： 是/是
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ（5x5）
包裝： 帶卷 (TR)
ADF4350
Rev. A | Page 24 of 32
SPUR CONSISTENCY AND FRACTIONAL SPUR
OPTIMIZATION
When a new frequency is programmed, the second sync pulse
after the LE rising edge is used to resynchronize the output
phase to the reference. The tSYNC time is to be programmed to
a value that is as least as long as the worst-case lock time. This
guarantees the phase resync occurs after the last cycle slip in the
PLL settling transient.
With dither off, the fractional spur pattern due to the quantiza-
tion noise of the SDM also depends on the particular phase
word with which the modulator is seeded.
The phase word can be varied to optimize the fractional and
subfractional spur levels on any particular frequency. Thus, a
look-up table of phase values corresponding to each frequency
can be constructed for use when programming the ADF4350.
In the example shown in Figure 33, the PFD reference is 25 MHz
and MOD = 125 for a 200 kHz channel spacing. tSYNC is set to
400 μs by programming CLK_DIV_VALUE = 80.
LE
PHASE
FREQUENCY
SYNC
(INTERNAL)
–100
0
100
200
1000
300
400
500
600 700 800
900
0
73
25-
020
TIME (s)
PLL SETTLES TO
CORRECT PHASE
AFTER RESYNC
tSYNC
LAST CYCLE SLIP
PLL SETTLES TO
INCORRECT PHASE
If a look-up table is not used, keep the phase word at a constant
value to ensure consistent spur levels on any particular frequency.
PHASE RESYNC
The output of a fractional-N PLL can settle to any one of the
MOD phase offsets with respect to the input reference, where
MOD is the fractional modulus. The phase resync feature in the
ADF4350 produces a consistent output phase offset with respect
to the input reference. This is necessary in applications where the
output phase and frequency are important, such as digital beam
forming. See the Phase Programmability section to program a
specific RF output phase when using phase resync.
Phase resync is enabled by setting Bits [DB16:DB15] in
Register 3 to 1, 0. When phase resync is enabled, an internal
timer generates sync signals at intervals of tSYNC given by the
following formula:
Figure 33. Phase Resync Example
Phase Programmability
The phase word in Register 1 controls the RF output phase. As
this word is swept from 0 to MOD, the RF output phase sweeps
over a 360° range in steps of 360°/MOD.
tSYNC = CLK_DIV_VALUE × MOD × tPFD
where:
tPFD is the PFD reference period.
CLK_DIV_VALUE is the decimal value programmed in
Bits [DB14:DB3] of Register 3 and can be any integer in the
range of 1 to 4095.
MOD is the modulus value programmed in Bits [DB14:DB3] of
Register 1 (R1).
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參數(shù)描述
ADF4350BCPZ-RL7 功能描述:IC SYNTH PLL VCO FN/IN 32LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類(lèi)型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:1GHz 除法器/乘法器:是/無(wú) 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱(chēng):NJW1504V-TE1-NDNJW1504V-TE1TR
ADF4350BCPZ-U6 制造商:Analog Devices 功能描述:
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ADF4351BCPZ 功能描述:IC SYNTH PLL VCO 32LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類(lèi)型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無(wú) 頻率 - 最大:240MHz 除法器/乘法器:是/無(wú) 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR)
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