參數(shù)資料
型號(hào): ADE7753ARS
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: Active and Apparent Energy Metering IC with di/dt sensor interface
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: MO-150AE, SSOP-20
文件頁(yè)數(shù): 34/38頁(yè)
文件大?。?/td> 449K
代理商: ADE7753ARS
ADE7753
–34–
REV. PrF 10/02
PRELIMINARY TECHNICAL DATA
Interrupt Status Register (0BH) / Reset Interrupt Status Register (0CH) /Interrupt E nable Register (0Ah)
T he Status Register is used by the MCU to determine the source of an interrupt request (
IRQ
). When an interrupt event occurs
in the ADE7753, the corresponding flag in the Interrupt Status register is set logic high. If the enable bit for this flag is logic
one in the Interrupt Enable register, the
IRQ
logic output goes active low. When the MCU services the interrupt it must first
carry out a read from the Interrupt Status Register to determine the source of the interrupt.
T able VII: Interrupt Status Register, Reset Interrupt Status Register & Interrupt E nable Register
Interrupt
F lag
Description
Bit
L ocation
0h
A E H F
Indicates that an interrupt was caused by the 0 to 1 transition of the MSB of the Active
Energy register (i.e. the AENERGY register is half full)
Indicates that an interrupt was caused by a SAG on the line voltage or no zero crossings were
detected.
Indicates the end of energy accumulation over an integer number of half line cycles as
defined by the content of the LINECYC Register—see
Line Cycle Energy Accumulation Mode
Indicates that new data is present in the Waveform Register.
T his status bit reflects the status of the ZX logic ouput—see
Zero Crossing Detection
Indicates that a temperature conversion result is available in the T emperature Register.
Indicates the end of a reset (for both software or hardware reset). T he corresponding
enable bit has no function in the Interrupt Enable Register, i.e. this status bit is set at
the end of a reset, but it cannot be enabled to cause an interrupt.
Indicates that the Active Energy register has overflowed.
Indicates that waveform sample from Channel2 has exceeded the VPK LVL value.
Indicates that waveform sample from Channel1 has exceeded the IPK LVL value.
Indicates that an interrupt was caused by the 0 to 1 transition of the MSB of the Apparent
Energy register (i.e. the VAENERGY register is half full)
Indicates that the Apparent Enrgy register has overflowed.
Indicates that an interrupt was caused by a missing zero crossing on the line voltage for the
specified number of line cycles—see
Zero Crossing Time Out
Indicates that the power has gone from negative to positive.
Indicates that the power has gone from positive to negative.
Reserved
1h
SA G
2h
C Y C E N D
3h
4h
5h
6h
W SM P
Z X
T E M P
R E SE T
7h
8h
9h
Ah
A E OF
PK V
PK I
V AE H F
Bh
C h
V A E OF
Z X T O
D h
E h
F h
PPOS
PN E G
R E SE R V E D
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