ADE7169F16
Preliminary Technical Data
Bit Location
Rev. PrD | Page 136 of 140
Bit
Addr.
0x87
0x86
0x85
0x84
0x83
0x82
0x81
0x80
Bit
Name
T1
T0
CF2
CF1
INT1
Default
Value
1
1
1
1
1
1
1
1
Description
7
6
5
4
3
2
1
0
Table 139. Port 1 SFR (P1, 0x90)
Note: When an alternate function is chosen for a pin of this port, the bit controlling this pin should always be set
Bit Location
Bit
Addr.
Name
value
7
0x97
1
This bit reflects the state of P1.7 pin. It can be written or read.
6
0x96
1
This bit reflects the state of P1.6 pin. It can be written or read.
5
0x95
1
This bit reflects the state of P1.5 pin. It can be written or read.
4
0x94
T2
1
This bit reflects the state of P1.4/T2 pin. It can be written or read.
3
0x93
T2EX
1
This bit reflects the state of P1.3/T2EX pin. It can be written or read.
2
0x92
1
This bit reflects the state of P1.2 pin. It can be written or read.
1
0x91
TxD
1
This bit reflects the state of P1.1/TxD pin. It can be written or read.
0
0x90
RxD
1
This bit reflects the state of P1.0/RxD pin. It can be written or read.
Table 140. Port 2 SFR (P2, 0xA0)
Note: When an alternate function is chosen for a pin of this port, the bit controlling this pin should always be set
Bit Location
Bit
Addr.
Name
Value
7 - 2
0x97 –
0x92
1
0x91
P2.1
1
This bit reflects the state of P2.1 pin. It can be written or read.
0
0x90
P2.0
1
This bit reflects the state of P2.0 pin. It can be written or read.
This bit reflects the state of P0.7/SS/T1 pin. It can be written or read.
This bit reflects the state of P0.6/SCLK/T0 pin. It can be written or read.
This bit reflects the state of P0.5/MISO pin. It can be written or read.
This bit reflects the state of P0.4/MOSI/SDATA pin. It can be written or read.
This bit reflects the state of P0.3/CF2 pin. It can be written or read.
This bit reflects the state of P0.2/CF1 pin. It can be written or read.
This bit reflects the state of P0.1 pin. It can be written or read.
This bit reflects the state of P0.0/INT1/BCTRL pin. It can be written or read.
Bit
Default
Description
Bit
Default
Description
0x3F
These bits are unused and should be left set
Table 141. Port 0 Alternate Functions
Pin
No.
BCTRL external battery control input
P0.0
Alternate Function
Alternate Function Enable
Set INT1PROG[2:0]=X01 in the Interrupt pins configuration
SFR (INTPR, 0xFF)
INT1 external interrupt
Set EX1 in the Interrupt Enable SFR (IE, 0xA8).
INT1 wakeup from PSM2 operating mode
Set INT1PROG[2:0]=11X in the Interrupt pins configuration
SFR (INTPR, 0xFF)
Set FP19EN in the LCD Segment Enable 2 SFR (LCDSEGE2,
0xED)
Clear the DISCF1 bit in the ADE energy measurement
internal MODE1 register (0x0B)
Clear the DISCF2 bit in the ADE energy measurement
internal MODE1 register (0x0B)
Set the SCPS bit in the CFG SFR and set the SPIEN bit in the
SPI Configuration Register SFR (SPIMOD1, 0xE8).
Clear the SCPS bit in the Configuration SFR (CFG, 0xAF) and
set the I2CEN bit in the I2C Mode Register SFR (I2CMOD,
0xE8).
P0.1
FP19 LCD Segment Pin
P0.2
CF1 ADE Calibration Frequency output
P0.3
CF2 ADE Calibration Frequency output
MOSI SPI Data line
P0.4
SDATA I
2
C Data line