參數(shù)資料
型號： ADE7169ACPZF16-RL
廠商： ANALOG DEVICES INC
元件分類： 模擬信號調(diào)理
英文描述： Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
中文描述： SPECIALTY ANALOG CIRCUIT, QCC64
封裝： 9 X 9 MM, ROHS COMPLIANT, MO-22-VMMD-4, LFCSP-64
文件頁數(shù)： 54/140頁
文件大?。?/td> 1359K
代理商： ADE7169ACPZF16-RL
ADE7169F16
Preliminary Technical Data
The Active Energy accumulation depends on the setting of the
POAM and ABSAM bits in the ACCMODE register (0x0F).
When both bits are cleared, the addition is signed and therefore
negative energy is subtracted from the active energy contents.
When both bits are set, the ADE7169F16 is set to be in the more
restrictive mode, the Positive Only Accumulation mode.
Rev. PrD | Page 54 of 140
When POAM bit in the ACCMODE register (0x0F) is set, only
positive power contributes to the active energy accumulation —
see the Watt positive-only accumulation mode section.
When ABSAM bit in the ACCMODE register (0x0F) is set, the
absolute active power is used for the active energy accumulation
— see the Watt absolute accumulation mode section.
The output of the multiplier is divided by WDIV. If the value in
the WDIV register is equal to 0, then the internal active energy
register is divided by 1. WDIV is an 8-bit unsigned register.
After dividing by WDIV, the active energy is accumulated in a
49-bit internal energy accumulation register. The upper 24 bits
of this register are accessible through a read to the active energy
register (WATTHR[23:0]). A read to the RWATTHR register
returns the content of the WATTHR register and the upper 24
bits of the internal register are cleared. As shown in Figure 39, the
active power signal is accumulated in an internal 49-bit signed
register. The active power signal can be read from the waveform
register by setting the WAVMODE register (0x0D) and setting
the WFSM bit in the Interrupt Enable Register 3 SFR
(MIRQENH, 0xDB). Like the current and voltage channels
waveform sampling modes, the waveform date is available at
sample rates of 27.9 kSPS, 14 kSPS, 7 kSPS, or
3.5 kSPS.
Figure 40 shows this energy accumulation for full-scale signals
(sinusoidal) on the analog inputs. The three curves displayed
illustrate the minimum period of time it takes the energy register
to roll over when the active power gain register contents are
0x7FF, 0x000, and 0x800. The watt gain register is used to carry
out power calibration in the ADE7169F16. As shown, the fastest
integration time occurs when the watt gain register is set to
maximum full scale, i.e., 0x7FF.
0x00,0000
0x7F,FFFF
0x3F,FFFF
0x40,0000
0x80,0000
WATTHR [23:0]
6.82
3.41
10.2
13.7
TIME (minutes)
WGAIN = 0x7FF
WGAIN = 0x000
WGAIN = 0x800
Figure 40. Energy Register Rollover Time for Full-Scale Power
(Minimum and Maximum Power Gain)
Note that the energy register contents rolls over to full-scale
negative (0x800000) and continues to increase in value when
the power or energy flow is positive—see Figure 40. Conversely,
if the power is negative, the energy register underflows to full-
scale positive (0x7FFFFF) and continues to decrease in value.
By using the interrupt enable register, the ADE7169F16 can be
configured to issue an ADE interrupt to the 8052 core when the
active energy register is half-full (positive or negative) or when
an overflow or underflow occurs.
Integration time under steady Load
As mentioned in the last section, the discrete time sample
period (T) for the accumulation register is 1.22 μs (5/CLKIN).
With full-scale sinusoidal signals on the analog inputs and the
WGAIN register set to 0x000, the average word value from each
LPF2 is 0xCCCCD—see Figure 37. The maximum positive
value that can be stored in the internal 49-bit register is 2
48
or
0xFFFF,FFFF,FFFF before it overflows. The integration time
under these conditions with WDIV = 0 is calculated as follows:
Time
=
xCCCCD
0
FFFF
FFFF,
xFFFF,
0
× 1.22 μs = 409.6 s = 6.82 min (15)
When WDIV is set to a value different from 0, the integration
time varies, as shown in Equation 16.
WDIV
Time
Time
WDIV
×
=
=
0
(16)
Active energy accumulation modes
Watt signed accumulation mode
The ADE7169F16 active energy default accumulation mode is a
signed accumulation based on the active power information.
Watt positive-only accumulation mode
The ADE7169F16 is placed in positive-only accumulation mode
by setting the POAM bit in the ACCMODE register (0x0F). In
positive-only accumulation mode, the energy accumulation is
done only for positive power, ignoring any occurrence of
negative power above or below the no-load threshold, as shown
in Figure 41. The CF pulse also reflects this accumulation
method when in this mode. The default setting for this mode is
off. Detection of the transitions in the direction of power flow,
and no-load threshold are active in this mode.
相關PDF資料
PDF描述
ADE7169ASTF16 Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTF16-RL Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTZF16 Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTZF16-RL Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169F16 Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
相關代理商/技術參數(shù)
參數(shù)描述
ADE7169ACPZF16-RL1 制造商:AD 制造商全稱:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTF16 制造商:AD 制造商全稱:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTF16-RL 制造商:AD 制造商全稱:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTZF16 功能描述:IC ENERGY METER 1PHASE 64LQFP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測量 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:*
ADE7169ASTZF16-RL 功能描述:IC ENERGY METER 1PHASE 64LQFP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測量 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:*
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*