參數(shù)資料
型號(hào): ADDI9023BBCZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 0K
描述: IC DRVR CCD VERT 12CH 40CSPBGA
標(biāo)準(zhǔn)包裝: 1
類(lèi)型: CCD 垂直驅(qū)動(dòng)器
應(yīng)用: 數(shù)碼相機(jī)
安裝類(lèi)型: 表面貼裝
封裝/外殼: 40-TFBGA, CSPBGA
供應(yīng)商設(shè)備封裝: 40-CSPBGA (6x6)
包裝: 托盤(pán)
Vertical Driver for CCD Cameras
Data Sheet
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2012 Analog Devices, Inc. All rights reserved.
FEATURES
12-channel vertical driver
8 three-level drivers
4 two-level drivers
Substrate clock driver
Input logic supports a 1.6 V to 3.6 V range
Output drivers support a 9.5 V to +15.5 V range
6 mm × 6 mm CSP_BGA package with 0.65 mm pitch
APPLICATIONS
Digital still cameras
Industrial cameras
Surveillance cameras
Medical imaging
GENERAL DESCRIPTION
The ADDI9023 is a 12-channel vertical driver for charge-coupled
device (CCD) imaging applications. It includes eight three-level
drivers and four two-level drivers. The input configuration can
support up to nine individual vertical timing phases and eight shift
gate signals. A separate substrate clock channel (SUBCK) is also
included. Typical load drive capability for each channel is 3 nF.
The ADDI9023 is specified over an operating temperature range
of 25°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
V8
XV8
THREE-LEVEL
OUTPUTS
TWO-LEVEL
OUTPUTS
V6
V7
XV7
XSG1
XV1
XSG2
XSG3
XV2
XSG4
XV3
XSG6
XV4
XSG7
XV6
XSG8
XV9
XSUBCK
V9
SUBCK
V1A
+
V1B
V2A
V2B
V3A
V3B
V4
V5
XSG5
+
VLL
ADDI9023
+
XV5
10693-
004
VDD
VH
VM VL
Figure 1.
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