參數(shù)資料
型號: ADAU1328
廠商: Analog Devices, Inc.
元件分類: Codec
英文描述: 2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec
中文描述: 2藝發(fā)局/ 8鎖相環(huán),192千赫,24位編解碼器數(shù)模轉(zhuǎn)換器
文件頁數(shù): 1/32頁
文件大?。?/td> 316K
代理商: ADAU1328
2 ADC/8 DAC with PLL,
192 kHz, 24-Bit Codec
ADAU1328
FEATURES
PLL generated or direct master clock
Low EMI design
108 dB DAC/107 dB ADC dynamic range and SNR
94 dB THD + N
Single 3.3 V supply
Tolerance for 5 V logic inputs
Supports 24 bits and 8 kHz to 192 kHz sample rates
Differential ADC input
Single-ended DAC output
Log volume control with autoramp function
SPI controllable for flexibility
Software controllable clickless mute
Software power-down
Right justified, left justified, I
2
S and TDM modes
Master and slave modes up to 16-channel in/out
48-lead LQFP
APPLICATIONS
Home theater systems
Set-top boxes
Digital audio effects processors
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
www.analog.com
GENERAL DESCRIPTION
The ADAU1328 is a high performance, single-chip codec that
provides two analog-to-digital converters (ADCs) with differential
input and eight digital-to-analog converters (DACs) with
single-ended output using the Analog Devices, Inc. patented
multibit sigma-delta (Σ-Δ) architecture. An SPI port is included,
allowing a microcontroller to adjust volume and many other
parameters. The ADAU1328 operates from 3.3 V digital and
analog supplies. The ADAU1328 is available in a 48-lead
(single-ended output) LQFP. Other members of this family
include a differential DAC output and I
2
C control port version.
The ADAU1328 is designed for low EMI. This consideration is
apparent in both the system and circuit design architectures.
By using the on-board PLL to derive the master clock from the
LR clock or from an external crystal, the ADAU1328 eliminates
the need for a separate high frequency master clock and can
also be used with a suppressed bit clock. The digital-to-analog
and analog-to-digital converters are designed using the latest
ADI continuous time architectures to further minimize EMI. By
using 3.3 V supplies, power consumption is minimized, further
reducing emissions.
FUNCTIONAL BLOCK DIAGRAM
DEC
FILTER
48/96/
192kHz
SERIAL DATA PORT
DIGITAL AUDIO
INPUT/OUTPUT
PRECISION
VOLTAGE
REFERENCE
TIMING MANAGEMENT
AND CONTROL
(CLOCK AND PLL)
CONTROL
PORT
SPI/I
2
C
CONTROL DATA
INPUT/OUTPUT
12.488MHz
6.144MHz
ADAU1328
ADC
ADC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DIGITAL
FILTER
AND
VOLUME
CONTROL
SDATA
OUT
SDATA
IN
CLOCKS
0
Figure 1.
相關(guān)PDF資料
PDF描述
ADAU1328BSTZ 2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec
ADAU1328BSTZ-RL 2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec
ADAU1701 SigmaDSP 28/56-Bit Audio Processor with 2ADC/4DAC
ADAU1701JSTZ SigmaDSP 28/56-Bit Audio Processor with 2ADC/4DAC
ADAU1701JSTZ-RL SigmaDSP 28/56-Bit Audio Processor with 2ADC/4DAC
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