參數(shù)資料
型號(hào): AD9992BBCZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 30/92頁(yè)
文件大?。?/td> 0K
描述: IC CCD SGNL PROC 12BIT 105CSPBGA
產(chǎn)品變化通告: AD9992 Discontinuation 22/Feb/2012
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號(hào)處理器,12 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 27mA
安裝類型: 表面貼裝
封裝/外殼: 105-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 105-CSPBGA(8x8)
包裝: 托盤
AD9992
Rev. C | Page 36 of 92
Vertical Masking Using FREEZE/RESUME Registers
As shown in Figure 43 and Figure 44, the FREEZE/RESUME
registers are used to temporarily mask the V-outputs. The pixel
locations to begin the masking (FREEZE) and end the masking
(RESUME) create an area in which the vertical toggle positions
are ignored. At the pixel location specified in the FREEZE register,
the V-outputs are held static at their current dc state, high or low.
The V-outputs are held until the pixel location that is specified
by the RESUME register is reached, at which point the signals
continue with any remaining toggle positions, if any exist.
Four sets of FREEZE/RESUME registers are provided, allowing the
vertical outputs to be interrupted up to four times in the same line.
The FREEZE and RESUME Position 1 to Position 4 are enabled
independently and applied to all groups (Group A, Group B, Group
C, and Group D) using the VMASK_EN register.
Note that when masking is enabled, Group A, Group B, Group C,
and Group D use the same FREEZE/RESUME positions.
Note that the FREEZE/RESUME registers are also used as the
VALTSEL0 and VALTSEL1 registers during special vertical
alternation mode.
XV1
XV24
HD
NO MASKING AREA
05
89
1-
0
43
Figure 43. No FREEZE/RESUME
XV1
XV24
HD
V-MASKING AREA
FREEZE
RESUME
NOTES
1. ALL TOGGLE POSITIONS WITHIN THE FREEZE/RESUME MASKING AREA ARE IGNORED. H-COUNTER CONTINUES TO COUNT DURING MASKING.
2. FOUR SEPARATE MASKING AREAS ARE AVAILABLE, USING FREEZE1/RESUME1, FREEZE2/RESUME2, FREEZE3/RESUME3, AND
FREEZE4/RESUME4 REGISTERS.
05
89
1-
04
4
Figure 44. Using FREEZE/RESUME
相關(guān)PDF資料
PDF描述
VI-JN3-IY-F1 CONVERTER MOD DC/DC 24V 50W
VI-JN2-IZ-B1 CONVERTER MOD DC/DC 15V 25W
VI-JN2-IY-F4 CONVERTER MOD DC/DC 15V 50W
VI-JN2-IY-F3 CONVERTER MOD DC/DC 15V 50W
AD22050NZ IC AMP DIFF SGL SUPPLY 8-DIP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9992BBCZRL 功能描述:IC CCD SGNL PROC 12BIT 105CSPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG,串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件
AD9993BBCZ 功能描述:IC MIXED-SIGNAL FRONT END 196BGA 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):在售 類型:ADC,DAC 輸入類型:LVDS 輸出類型:LVDS 接口:SPI 電流 - 電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:196-LFBGA,CSPBGA 供應(yīng)商器件封裝:196-CSPBGA(12x12) 標(biāo)準(zhǔn)包裝:1
AD9993BBCZRL 功能描述:IC MIXED-SIGNAL FRONT END 196BGA 制造商:analog devices inc. 系列:- 包裝:帶卷(TR) 零件狀態(tài):在售 類型:ADC,DAC 輸入類型:LVDS 輸出類型:LVDS 接口:SPI 電流 - 電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:196-LFBGA,CSPBGA 供應(yīng)商器件封裝:196-CSPBGA(12x12) 標(biāo)準(zhǔn)包裝:1,500
AD9993-EBZ 功能描述:EVAL BOARD MXFE AD9993 制造商:analog devices inc. 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1
AD9994 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator