參數(shù)資料
型號(hào)： AD9984AKSTZ-140
廠商： ANALOG DEVICES INC
元件分類： 其它接口
英文描述： High Performance 10-Bit Display Interface
中文描述： SPECIALTY INTERFACE CIRCUIT, PQFP80
封裝： ROHS COMPLIANT, MS-026BEC, LQFP-80
文件頁(yè)數(shù)： 39/44頁(yè)
文件大?。?/td> 490K
代理商： AD9984AKSTZ-140
AD9984A
0x2E—Bits[7:0] Test Register 6
Read/write bits for future use. Must be written to 0xE0 for
proper operation.
0x34—Bit[2] SOG Filter Enabler
When this bit is set to 1, the SOG does not pass pulses less than
250 ns in width. This reduces spurious signals that can improperly
drive the PLL circuit. Default for this bit is 0 or off.
0x36—Bit[0] VCO Gear Select
This bit allows the VCO to select a lower gear to run lower pixel
clocks while remaining in a more linear range.
Table 78. VCO Gear Select Bit
Rev. 0 | Page 39 of 44
Value
0
1
0x3C—Bits[7:4] Test Bits
Must be set to 0x0 for proper operation.
0x3C—Bit[3] Auto Gain Matching Hold
This bit controls whether the auto gain matching function runs
continuously or runs once and holds the result. Continuous
updates are recommended because they allow the AD9984A to
compensate for drift over time, temperature, and so on.
Result
Normal VCO setting.
Enables lower VCO clock output.
If one-time updates are preferred, they should be performed
every time the part is powered up and when there is a mode
change. To perform a one-time update, auto gain matching
must first be enabled (Register 0x3C, Bits[2:0]). Next, this bit
(auto gain matching hold) must first be set to 1 to let the auto
gain matching function operate and settle to a final value.
The auto gain matching hold bit should then be set to 0 to hold
the gain values that the auto circuitry calculates. The AD9984A
auto gain matching circuit’s maximum settle time is 10 updates.
For example, if the update frequency is set to once every 64 Hsyncs,
the maximum settling time would be 640 Hsyncs (10 × 64 Hsyncs).
Table 79. Auto Gain Matching Hold Bit
Value
Result
0
1
Disables auto gain updates and holds the current
auto gain values.
1
Allows auto gain to update continuously.
1
The power-up default setting is 0.
0x3C—Bits[2:0] Auto Gain Matching Enable
These bits enable or disable the auto gain matching function.
Table 80. Auto Gain Matching Enable Bits
Value
Result
000
Auto gain matching disabled.
110
Auto gain matching enabled.
相關(guān)PDF資料
PDF描述
AD9984AKSTZ-170 High Performance 10-Bit Display Interface
AD9984APCBZ High Performance 10-Bit Display Interface
AD9985A 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays
AD9985ABSTZ-110 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays
AD9985AKSTZ-110 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9984AKSTZ-170 功能描述:IC DISPLAY 10BIT 170MSPS 80LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
AD9984APCBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:High Performance 10-Bit Display Interface
AD9984KSTZ-110 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9984KSTZ-140 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9984KSTZ-170 制造商:Analog Devices 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*