參數(shù)資料
型號(hào)： AD9983AKCPZ-140
廠商： Analog Devices, Inc.
英文描述： High Performance 8-Bit Display Interface
中文描述： 高性能8位顯示接口
文件頁(yè)數(shù)： 39/44頁(yè)
文件大?。?/td> 470K
代理商： AD9983AKCPZ-140
Preliminary Technical Data
AD9983A
0x2C—Bits[7:5] Auto-Offset Hold
Must be written to 0x00 for proper operation.
0x2C—Bit[4] Auto-Offset Hold
A bit for controlling whether the auto-offset function runs
continuously or runs once and holds the result. Continuous
updates are recommended because this allows the AD9983A to
compensate for drift over time and temperature. If one-time
updates are preferred, these should be performed every time the
part is powered up and when there is a mode change. To do a
one-time update, first auto-offset must be enabled (Register
0x1B, Bit 5). Next, this bit (auto-offset hold) must first be set to
1 to let the auto-offset function operate and settle to a final
value. Auto-offset hold should then be set to 0 to hold the offset
values that the auto circuitry calculates. The AD9983A auto-
offset circuit’s maximum settle time is 10 updates. For example,
if the update frequency is set to once every 64 Hsyncs, then the
maximum settling time would be 640 Hsyncs (10 × 64 Hsyncs).
Rev. PrA | Page 39 of 44
Table 77. Auto-Offset Hold
Select
Result
0
Disables auto-offset updates and holds the
current auto-offset values
1
Allows auto-offset to update continuously
0x2C—Bits[3:0]
Must be written to 0x0 for proper operation.
0x2D—Bits[7:0] Test Register 5
Read/write bits for future use. Must be written to 0xE8 for
proper operation.
0x2E—Bits[7:0] Test Register 6
Read/write bits for future use. Must be written to 0xE0 for
proper operation.
0x34—Bit[2] SOG Filter Enable
This bit enables the SOG filter, which will reject inputs with a
width of less than 250 ns. This aids the PLL in the ability to
ignore extraneous (non-valid) sync pulses.
Table 78. SOG Filter Enable
Select
0
1
Result
SOG filter disabled
SOG filter enabled
0x36—Bit[0] VCO Gear Select
This bit allows the VCO to select a lower ‘gear’ which enables it
to run lower pixel clocks while remaining in a more linear range.
Table 79. VCO Gear Select
Select
0
1
0x3C—Bits[7:4] Test Bits
Must be set to 0x0 for proper operation.
0x3C—Bit[3] Auto Gain Matching Hold
A bit for controlling whether the auto gain matching function
runs continuously or runs once and holds the result.
Continuous updates are recommended because it allows the
AD9983A to compensate for drift over time and temperature.
If one-time updates are preferred, these should be performed
every time the part is powered up and when there is a mode
change. To do a one-time update, first auto gain matching must
be enabled (Register Ox3C, Bit 2). Next, this bit (Auto Gain
Matching Hold) must first be set to 1 to let the auto gain
matching function operate and settle to a final value. The Auto
Gain Matching Hold bit should then be set to 0 to hold the gain
values that the auto circuitry calculates. The AD9983A auto gain
matching circuit’s maximum settle time is 10 updates. For example,
if the update frequency is set to once every 64 Hsyncs, then the
maximum settling time would be 640 Hsyncs (10 x 64 Hsyncs).
Result
Normal VCO setting
Enables lower VCO clock output
Table 80. Auto Gain Hold
Select
0
Result
Disables auto gain updates and holds the
current auto offset values
Allows auto gain to update continuously
1
The power-up default setting is 0.
0x3C—Bits[2:0] Auto Gain Matching Enable
These bits enable or disable the auto gain matching function.
When set to 000, the auto gain matching function is disabled;
when set to 110 the auto gain matching function is enabled.
Table 81. Auto Gain Matching Enable
Select
Result
000
Auto gain matching disabled
110
Auto gain matching enabled
相關(guān)PDF資料
PDF描述
AD9983AKCPZ-1401 High Performance 8-Bit Display Interface
AD9983AKCPZ-170 High Performance 8-Bit Display Interface
AD9983AKCPZ-1701 High Performance 8-Bit Display Interface
AD9984AKCPZ-140 High Performance 10-Bit Display Interface
AD9984AKCPZ-170 High Performance 10-Bit Display Interface
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9983AKCPZ-1401 制造商:AD 制造商全稱:Analog Devices 功能描述:High Performance 8-Bit Display Interface
AD9983AKCPZ-170 功能描述:IC INTRFACE 8BIT 170MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁(yè)面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1
AD9983AKCPZ-1701 制造商:AD 制造商全稱:Analog Devices 功能描述:High Performance 8-Bit Display Interface
AD9983AKSTZ-140 功能描述:IC DISPLAY 8BIT 140MSPS 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁(yè)面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1
AD9983AKSTZ-1401 制造商:AD 制造商全稱:Analog Devices 功能描述:High Performance 8-Bit Display Interface
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