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參數(shù)資料
| 型號(hào)： | AD9803JST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | CCD Signal Processor For Electronic Cameras |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 7/19頁 |
| 文件大?。?/td> | 179K |
| 代理商： | AD9803JST |
AD9803
–7–
REV. 0
PIN FUNCTION DESCRIPTIONS
P
in #
1, 24
2–11
12
13
14
15
16
17
18
19
20
21
22
23
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin Name
NC
D0–D9
DRVDD
DRVSS
DVSS
ACLP
ADCCLK
DVDD
STBY
PBLK
CLPOB
SHP
SHD
CLPDM
CCDBYP2
DIN
PIN
CCDBYP1
PGACONT1
PGACONT2
ACVSS
CLPBYP
ACVDD
AUXIN
AUXCONT
ADCIN
CMLEVEL
VTRBYP
DAC1
DAC2
SL
SCK
ADVDD
SDATA
ADVSS
SUBST
VRB
VRT
Type
Description (See Figures 37 and 38 for Circuit Configurations)
No Connect (Should be Left Floating or Tied to Ground)
Digital Data Outputs
Digital Driver Supply (3 V)
Digital Driver Ground
Digital Ground
AUX-MODE/ADC-MODE Clamp
ADC Sample Clock Input
Digital Supply (3 V)
Power-Down Mode (Active Hi/Internal Pull-Down). Enables Reference Stand-By Mode.
Pixel Blanking
Black Level Restore Clamp
CCD Reference Sample Clock Input
CCD Data Sample Clock Input
Input Clamp
CDS Ground Bypass (0.1
μ
F to Ground)
CDS Negative Input (Tie to Pin 27 and AC-Couple to CCD Input Signal)
CDS Positive Input (See Above)
CDS Ground Bypass (0.1
μ
F to Ground)
PGA Coarse Gain Analog Control
PGA Fine Gain Analog Control
Analog Ground
Bias Bypass (0.1
μ
F to Ground)
Analog Supply (3 V)
AUX-MODE Input
AUX-MODE PGA Gain Analog Control
ADC-MODE Input
Common-Mode Level (0.1
μ
F to Ground)
Bias Bypass (0.1
μ
F to Ground)
DAC1 Output
DAC2 Output
Serial I/F Load Signal
Serial I/F Clock
Analog Supply (3 V)
Serial I/F Input Data
Analog Ground
Analog Ground
Bottom Reference (0.1
μ
F to Ground and 1
μ
F to VRT)
Top Reference (0.1
μ
F to Ground)
DO
P
P
P
P
DI
P
DI
DI
DI
DI
DI
DI
AO
AI
AI
AO
AI
AI
P
AO
P
AI
AI
AI
AO
AO
AO
AO
DI
DI
P
DI
P
P
AO
AO
NOTE
Type: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power.
PIN CONFIGURATION
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
48 47 46 45 44
39 38 37
43 42 41 40
PIN 1
TOP VIEW
(Not to Scale)
D
D
A
A
S
NC
(LSB) D0
D1
D2
D3
D4
D5
D6
D7
D8
(MSB) D9
DRVDD
P
C
S
S
AD9803
N
ADCIN
AUXCONT
AUXIN
ACVDD
CLPBYP
ACVSS
PGACONT2
PGACONT1
CCDBYP1
PIN
DIN
CCDBYP2
V
V
S
A
S
A
S
S
D
D
V
C
C
D
NC = NO CONNECT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9804 | Complete 10-Bit 18 MSPS CCD Signal Processor |
| AD9804JST | Complete 10-Bit 18 MSPS CCD Signal Processor |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9803JST-28 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9803JSTRL-28 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9804 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 10-Bit 18 MSPS CCD Signal Processor |
| AD9804AJST | 制造商:Analog Devices 功能描述:CCD Signal Processor 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10 BIT 18 MHZ NO PXGA - Tape and Reel |
| ad9804ajstrl | 制造商:Analog Devices 功能描述:CCD Signal Processor 48-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:10 BIT 18 MHZ NO PXGA - Tape and Reel |
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