參數(shù)資料
型號(hào)： AD9786-EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 40/56頁(yè)
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR AD9786
產(chǎn)品培訓(xùn)模塊： DAC Architectures
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC+®
DAC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 500M
數(shù)據(jù)接口： 并聯(lián)
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板，CD
已用 IC / 零件： AD9786
AD9786
Rev. B | Page 45 of 56
DATA INPUTS
Digital data inputs to the AD9786 are accessed on the evaluation
board through Connector J1 and Connector J2. These are 40-pin,
right-angle connectors that are intended to be used with standard
ribbon cable connectors. The input level should be 3.3 V. The
data format is selectable through Register 0x02, Bit 7 (DATAFMT).
With this bit set to a default 0, the AD9786 assumes that the input
data is in twos complement format. With this bit set to 1, data
should be input in offset binary format.
When the evaluation board is first powered up and the clock
and data are running, it is recommended that the proper operating
current be verified. Press Reset Switch SW1 to ensure that the
AD9786 is in default mode. The default mode for the AD9786 is
for the interpolation set to 1×. The modulator is turned off in
default mode. The nominal operating currents for the evaluation
board in the power-up default mode are shown in Table 39.
Table 39. Nominal Operating Currents in Power-Up Default
Mode
Nominal Current @ Speed (mA)
Evaluation Board
Power Supply
50
MSPS
100
MSPS
150
MSPS
200
MSPS
DVDD
26
49
74
99
CLKVDD
78
83
87
92
ACVDD/ADVDD
1
4
6
8
AVDD1
30
AVDD2
27
Table 40. SPI Registers
Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 0
0x01
INTERP[1]
INTERP[0]
SERIAL PORT
SW1 is a hard reset switch that sets the AD9786 to its default
state. It should be used every time the AD9786 power supply is
cycled, the clock is interrupted, or new data is to be written via
the SPI port. Set the SPI software to read back data from the
AD9786, and then verify that the expected values are read back
when the software is run.
ANALOG OUTPUT
The analog output of the AD9786 is accessed via Connector S3.
Once all settings are selected and the current levels and SPI port
functionality are verified, the analog signal at S3 can be viewed.
For most of the AD9786 applications, a spectrum analyzer is the
preferred instrument to verify proper performance. A typical
spectral plot is shown in Figure 86, with the AD9786 synthesizing
a two-tone signal in the default mode with a 200 MSPS sample
rate. A single-tone CW signal should provide output power of
approximately +0.5 dBm to the spectrum analyzer.
If the spectrum does not look correct at this point, the data
input might be violating setup and hold times with respect to
the input clock. To correct this, the user should vary the input
data timing. If this is not possible, SPI Register 0x02, Bit 4
(DCLKPOL), can be inverted. This bit controls the clock edge
upon which the data is latched. If neither of these methods corrects
the spectrum, it is unlikely that the issue is timing related. In this
case, verify that all instructions have been followed correctly and
that the SPI port readback indicates the correct values.
03152-086
STOP 200MHz
START 100MHz
19.9MHz/
0
–20
–10
–40
–30
–60
–50
–80
–70
–100
–90
–110
–120
1MA
A
0dBm
MARKER 1 [T1]
193.00170300MHz
–84.96dBm
VBW
SWT
RBW
30kHz
560ms
30kHz
UNIT
RF ATT
dBm
20dB
REF LVL
1AVG
Figure 86. Typical Spectral Plot
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