參數(shù)資料
型號: AD9779ABSVZRL
廠商: Analog Devices Inc
文件頁數(shù): 38/56頁
文件大小: 0K
描述: DAC 16BIT 1.0GSPS 100-TQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
設(shè)計資源: Interfacing ADL5370 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0016)
Interfacing ADL5371 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0017)
Interfacing ADL5372 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0018)
Interfacing ADL5373 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0019)
Interfacing ADL5374 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0020)
Interfacing ADL5375 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0021)
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 300mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 1G
AD9776A/AD9778A/AD9779A
Rev. B | Page 43 of 56
FULL-SCALE CURRENT GENERATION
I DAC
DAC FULL-SCALE
REFERENCE
CURRENT
SCALING
I DAC GAIN
Q DAC GAIN
Q DAC
AD9776A/AD9778A/AD9779A
VREF
10k
1.2V BAND GAP
0.1F
I120
06452
-073
INTERNAL REFERENCE
Full-scale current on the I DAC and Q DAC can be set from
8.66 mA to 31.66 mA. Initially, the 1.2 V band gap reference is
used to set up a current in an external resistor connected to I120
(Pin 75). A simplified block diagram of the reference circuitry is
shown in Figure 76. The recommended value for the external
resistor is 10 kΩ, which sets up an IREFERENCE in the resistor of
120 μA, which in turn provides a DAC output full-scale current
of 20 mA. Because the gain error is a linear function of this resistor,
a high precision resistor improves gain matching to the internal
matching specification of the devices. Gain drift over temperature
is also affected by this resistor. A resistor with a low temperature
coefficient is recommended in applications requiring good gain
stability.
Figure 76. Reference Circuitry
35
0
1000
DAC GAIN CODE
I FS
(m
A
)
30
25
20
15
10
5
200
400
600
800
06
45
2-
07
4
Internal current mirrors provide a current-gain scaling, where
the I DAC or Q DAC gain is a 10-bit word in the 3-wire interface
port register (Register 0x0B, Register 0x0C, Register 0x0F, and
Register 0x10). The default value for the DAC gain registers
gives an IFS of approximately 20 mA. IFS is equal to
32
1024
6
12
27
V
1.2
×
×
+
×
=
DAC Gain
R
I
FS
Figure 77. IFS vs. DAC Gain Code
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