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參數(shù)資料
| 型號： | AD9777EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 16-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converter |
| 中文描述： | 16位，160 MSPS的2X/4X/8X TxDAC系列插雙D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 38/48頁 |
| 文件大?。?/td> | 6021K |
| 代理商： | AD9777EB |
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REV. 0
–38–
AD9777
FREQUENCY – MHz
A
–80
0
762.5
–70
–60
–50
–40
–30
–20
–10
–90
–100
782.5
802.5
822.5
842.5
Figure 54. AD9777/AD8345 Synthesizing a Three
Carrier WCDMA Signal at an LO of 800 MHz
EVALUATION BOARD
The AD9777 evaluation board allows easy configuration of the
various modes, programmable via the SPI port. Software is available
for programming the SPI port from either Win95
or Win98
. The
evaluation board also contains an AD8345 quadrature modu-
lator and support circuitry that allows the user to optimally
configure the AD9777 in an image reject transmit signal chain.
Figures 55 through 58 describe how to configure the evaluation
board in the one and two port input modes with the PLL enabled
and disabled. Refer to Figures 59 through 68, the schematics, and
the layout for the AD9777 evaluation board for the jumper loca-
tions described below. The AD9777 outputs can be configured
for various applications by referring to the following instructions.
DAC Single-Ended Outputs
Remove transformers T2 and T3. Solder jumper link JP4 or
JP28 to look at the DAC1 outputs. Solder jumper link JP29 or
JP30 to look at the DAC2 outputs. Jumpers 8 and 13–17 should
remain unsoldered. The jumpers JP35–JP38 may be used to
ground one of the DAC outputs while the other is measured
single-ended. Optimum single-ended distortion performance is
typically achieved in this manner. The outputs are taken from
S3 and S4.
DAC Differential Outputs
Transformers T2 and T3 should be in place. Note that the lower
band of operation for these transformers is 300 kHz to 500 kHz.
Jumpers 4, 8, 13–17, and 28–30 should remain unsoldered. The
outputs are taken from S3 and S4.
Using the AD8345
Remove transformers T2 and T3. Jumpers JP4 and 28–30 should
remain unsoldered. Jumpers 13–16 should be soldered. The
desired components for the low pass interface filters L6, L7,
C55, and C81 should be in place. The LO drive is connected to
the AD8345 via J10 and the balun T4, and the AD8345 output
is taken from J9.
Win95 and Win98 are a registered trademarks of Microsoft Corporation.
AD9777 while meeting other system level objectives (i.e., cost,
power) is recommended. The op amp’s differential gain, gain
setting resistor values, and full-scale output swing capabilities
should all be considered when optimizing this circuit. R
OPT
is
only necessary if level shifting is required on the op amp output.
In Figure 53, AVDD, which is the positive analog supply for
both the AD9777 and the op amp, is also used to level shift the
differential output of the AD9777 to midsupply (i.e., AVDD/2).
INTERFACING THE AD9777 WITH THE AD8345
QUADRATURE MODULATOR
The AD9777 architecture was defined to operate in a transmit
signal chain using an image reject architecture. A quadrature
modulator is also required in this application and should be
designed to meet the output characteristics of the DAC as much
as possible. The AD8345 from Analog Devices meets many of
the requirements for interfacing with the AD9777. As with any
DAC output interface, there are a number of issues that have to
be resolved. Among the major issues are the following.
DAC Compliance Voltage/Input Common-Mode Range
The dynamic range of the AD9777 is optimal when the DAC
outputs swing between
±
1.0 V. The input common-mode range
of the AD8345, at 0.7 V, allows optimum dynamic range to be
achieved in both components.
Gain/Offset Adjust
The matching of the DAC output to the common-mode input
of the AD8345 allows the two components to be dc-coupled,
with no level shifting necessary. The combined voltage offset of
the two parts can therefore be compensated for via the AD9777
programmable offset adjust. This allows excellent LO cancella-
tion at the AD8345 output. The programmable gain adjust
allows for optimal image rejection as well.
The AD9777 evaluation board includes an AD8345 and recom-
mended interface (Figures 59 and 60). On the output of the
AD9777, R9 and R10 convert the DAC output current to a voltage.
R16 may be used to do a slight common-mode shift if necessary.
The (now voltage) signal is applied to a low pass reconstruction
filter to reject DAC images. The components installed on the
AD9777 provide a 35 MHz cutoff, but may be changed to fit
the application. A balun (Mini-Circuits ADTL1-12) is used to
cross the ground plane boundary to the AD8345. Another balun
(Mini-Circuits ETC1-1-13) is used to couple the LO input of
the AD8345. The interface requires a low ac impedance return
path from the AD8345, so a single connection between the
AD9777 and AD8345 ground planes is recommended.
The performance of the AD9777 and AD8345 in an image reject
transmitter, reconstructing three WCDMA carriers, can be seen in
Figure 54. The LO of the AD8345 in this application is 800 MHz.
Image rejection (50 dB) and LO feedthrough (–78 dBFS) have
been optimized with the programmable features of the AD9777.
The average output power of the digital waveform for this test was
set to –15 dBFS to account for the peak-to-average ratio of the
WCDMA signal.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9777-EB | 制造商:Analog Devices 功能描述:Evaluation Board For DAC, 16-Bit, 160MSPS 2/4/8 Interpolating Dual TxDAC+ D/A Converter 制造商:Analog Devices 功能描述:16BIT 160 MSPS DUAL TXDAC+ D/A CONVERTER - Bulk 制造商:Rochester Electronics LLC 功能描述:16BIT 160 MSPS DUAL TXDAC+ D/A CONVERTER - Bulk |
| AD9777-EBZ | 功能描述:BOARD EVALUATION FOR AD9777 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9778 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MHz to 6 GHz Broadband Quadrature Modulator |
| AD9778A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual, 12-/14-/16-Bit,1 GSPS Digital-to-Analog Converters |
| AD9778ABSVZ | 功能描述:DAC 14BIT 1.0GSPS 100-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
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