參數(shù)資料
型號(hào)： AD9736-DPG2-EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 43/72頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD9736
產(chǎn)品培訓(xùn)模塊： DAC Architectures
設(shè)計(jì)資源： AD9736-DPG2-EBZ Schematic
AD9736-DPG2-EBZ BOM
AD9736-DPG2-EBZ Gerber Files
標(biāo)準(zhǔn)包裝： 1
DAC 的數(shù)量： 1
位數(shù)： 14
采樣率（每秒）： 1.2G
數(shù)據(jù)接口： 并聯(lián)
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9736
AD9734/AD9735/AD9736
Rev. A | Page 48 of 72
ANALOG CONTROL REGISTERS
The AD973x includes some registers for optimizing its analog
performance. These registers include temperature trim for the
band gap, noise reduction in the output current mirror, and
output current mirror headroom adjustments.
BAND GAP TEMPERATURE CHARACTERISTIC
TRIM BITS
Using TRMBG<2:0> (Reg. 14, Bits 2:0), the temperature
characteristic of the internal band gap can be trimmed to
minimize the drift over temperature, as shown in Figure 86.
–50 –40 –30 –20 –10 0 10203040506070
8090
TEMPERATURE (
°C)
VREF
(
V
)
1.23
1.22
1.21
1.2
1.19
1.18
04862-084
000
010
001
011
101
110
111
100
Figure 86. Band Gap Temperature Characteristic for Various TRMBG Values
The temperature changes are sensitive to process variations,
and Figure 86 may not be representative of all fabrication lots.
Optimum adjustment requires measurement of the device
operation at two temperatures and development of a trim
algorithm to program the correct TRMBG<2:0> values in
external nonvolatile memory.
MIRROR ROLL-OFF FREQUENCY CONTROL
With MSEL <1:0> (Reg. 14, Bits 7:6), the user can adjust the
noise contribution of the internal current mirror to optimize
the 1/f noise. Figure 87 shows MSEL vs. the 1/f noise with
20 mA full-scale current into a 50 Ω resistor.
F (kHz)
NOISE
(IdBm/Hz)
–110
–115
–120
–125
–130
–140
–135
1
10
100
04862-0-085
MSEL0
MSEL2
MSEL1
MSEL3
Figure 87. 1/f Noise with Respect to MSEL Bits
HEADROOM BITS
HDRM<7:0> (Reg. 15, Bits 7:0) are for internal evaluation.
Changing the default reset values is not recommended.
VOLTAGE REFERENCE
The AD973x output current is set by a combination of digital
control bits and the I120 reference current, as shown in
CURRENT
SCALING
FSC<9:0>
AD973x
DAC
IFULL-SCALE
10k
Ω
1nF
VREF
I120
AVSS
I120
VBG
1.2V
+
–
04862-086
Figure 88. Voltage Reference Circuit
The reference current is obtained by forcing the band gap
voltage across an external 10 kΩ resistor from I120 (Pin B14) to
ground. The 1.2 V nominal band gap voltage (VREF) generates a
120 μA reference current in the 10 kΩ resistor. This current is
adjusted digitally by FSC<9:0> (Reg. 2, Reg. 3) to set the output
full-scale current IFS:
>
<
×
+
×
=
0
.
9
1024
192
72
FSC
R
V
I
REF
FS
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