參數(shù)資料
型號(hào)： AD9736-DPG2-EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 3/72頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD9736
產(chǎn)品培訓(xùn)模塊： DAC Architectures
設(shè)計(jì)資源： AD9736-DPG2-EBZ Schematic
AD9736-DPG2-EBZ BOM
AD9736-DPG2-EBZ Gerber Files
標(biāo)準(zhǔn)包裝： 1
DAC 的數(shù)量： 1
位數(shù)： 14
采樣率（每秒）： 1.2G
數(shù)據(jù)接口： 并聯(lián)
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9736
AD9734/AD9735/AD9736
Rev. A | Page 11 of 72
Pin No.
Mnemonic
Description
K1, K2, K3, K4, K11, K12, L2, L3, L4, L5, L6,
L9, L10, L11, L12, M3, M4, M5, M6, M9,
M10, M11, M12
DVSS
Digital Supply Ground.
K13, K14
DB<13>/DB<13>+
Negative/Positive Data Input Bit 13 (MSB). Conforms to IEEE-1596
reduced range link.
L1
PIN_MODE
0 = SPI Mode. SPI is enabled.
1 = PIN Mode. SPI is disabled; direct pin control.
L7, L8, M7, M8, N7, N8, P7, P8
DVDD33
3.3 V Digital Supply.
L13, L14
DB<12>/DB<12>+
Negative/Positive Data Input Bit 12. Conforms to IEEE-1596 reduced
range link.
M2, M1
DB<0>/DB<0>+
Negative/Positive Data Input Bit 0 (LSB). Conforms to IEEE-1596
reduced range link.
M13, M14
DB<11>/DB<11>+
Negative/Positive Data Input Bit 11. Conforms to IEEE-1596 reduced
range link.
N1, P1
DB<1>/DB<1>+
Negative/Positive Data Input Bit 1. Conforms to IEEE-1596 reduced
range link.
N2, P2
DB<2>/DB<2>+
Negative/Positive Data Input Bit 2. Conforms to IEEE-1596 reduced
range link.
N3, P3
DB<3>/DB<3>+
Negative/Positive Data Input Bit 3. Conforms to IEEE-1596 reduced
range link.
N4, P4
DB<4>/DB<4>+
Negative/Positive Data Input Bit 4. Conforms to IEEE-1596 reduced
range link.
N5, P5
DB<5>/DB<5>+
Negative/Positive Data Input Bit 5. Conforms to IEEE-1596 reduced
range link.
N6, P6
DATACLK_OUT/
DATACLK_OUT+
Negative/Positive Data Output Clock. Conforms to IEEE-1596
reduced range link.
N9, P9
DATACLK_IN/
DATACLK_IN+
Negative/Positive Data Input Clock. Conforms to IEEE-1596 reduced
range link.
N10, P10
DB<6>/DB<6>+
Negative/Positive Data Input Bit 6. Conforms to IEEE-1596 reduced
range link.
N11, P11
DB<7>/DB<7>+
Negative/Positive Data Input Bit 7. Conforms to IEEE-1596 reduced
range link.
N12, P12
DB<8>/DB<8>+
Negative/Positive Data Input Bit 8. Conforms to IEEE-1596 reduced
range link.
N13, P13
DB<9>/DB<9>+
Negative/Positive Data Input Bit 9. Conforms to IEEE-1596 reduced
range link.
N14, P14
DB<10>/DB<10>+
Negative/Positive Data Input Bit 10. Conforms to IEEE-1596 reduced
range link.
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