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AD9709
Rev. B | Page 21 of 32
An example serves to illustrate the effect of supply noise on the
analog supply. Suppose a switching regulator with a switching
frequency of 250 kHz produces 10 mV of noise and, for simplicity’s
sake, all of this noise is concentrated at 250 kHz (that is, ignore
harmonics). To calculate how much of this undesired noise will
appear as current noise superimposed on the DAC full-scale
current, IOUTFS, one must determine the PSRR in decibels using
Figure 41 at 250 kHz. To calculate the PSRR for a given RLOAD, such that the units of PSRR are converted from A/V to V/V,
adjust the curve in Figure 41 by the scaling factor 20 × log(RLOAD). For instance, if RLOAD is 50 Ω, the PSRR is reduced by 34 dB
(that is, the PSRR of the DAC at 250 kHz, which is 85 dB in
Proper grounding and decoupling should be a primary
objective in any high speed, high resolution system. The
AD9709 features separate analog and digital supply and ground
pins to optimize the management of analog and digital ground
currents in a system. In general, decouple the analog supply
(AVDD) to the analog common (ACOM) as close to the chip as
physically possible. Similarly, decouple DVDD1/DVDD2, the
digital supply (DVDD1/DVDD2) to the digital common
(DCOM1/DCOM2) as close to the chip as possible.
For applications that require a single 5 V or 3.3 V supply for
both the analog and digital supplies, a clean analog supply can
be generated using the circuit shown in
Figure 42. The circuit
consists of a differential LC filter with separate power supply
and return lines. Lower noise can be attained by using low-ESR
type electrolytic and tantalum capacitors.
TTL/CMOS
LOGIC
CIRCUITS
100F
0.1F
AVDD
ACOM
ELECTROLYTIC
TANTALUM
CERAMIC
5V
POWER SUPPLY
FERRITE
BEADS
10F
TO
22F
00
60
6-
0
41
Figure 42. Differential LC Filter for Single 5 V and 3.3 V Applications