參數(shù)資料
型號: AD9280-EB
廠商: Analog Devices, Inc.
英文描述: Complete 8-Bit, 32 MSPS, 95 mW CMOS A/D Converter
中文描述: 完整的8位,32 MSPS的95毫瓦的CMOS A / D轉(zhuǎn)換
文件頁數(shù): 4/24頁
文件大?。?/td> 366K
代理商: AD9280-EB
AD9280
–4–
REV. D
ABSOLUTE MAXIMUM RATINGS*
With
Respect
to
Parameter
Min
Max
Units
AVDD
DRVDD
AVSS
AVDD
MODE
CLK
Digital Outputs
AIN
VREF
REFSENSE
REFTF, REFTB
REFTS, REFBS
Junction Temperature
Storage Temperature
Lead Temperature
10 sec
AVSS
DRVSS
DRVSS
DRVDD
AVSS
AVSS
DRVSS
AVSS
AVSS
AVSS
AVSS
AVSS
–0.3
–0.3
–0.3
–6.5
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
+6.5
+6.5
+0.3
+6.5
AVDD + 0.3
AVDD + 0.3
DRVDD + 0.3 V
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
+150
+150
V
V
V
V
V
V
V
V
V
V
V
°
C
°
C
–65
+300
°
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum
ratings for extended periods may effect device reliability.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option*
Model
AD9280ARS
AD9280ARSRL –40
°
C to +85
°
C 28-Lead SSOP (Reel) RS-28
AD9280-EB
–40
°
C to +85
°
C 28-Lead SSOP
RS-28
Evaluation Board
*RS = Shrink Small Outline.
Figure 2. Equivalent Circuits
f. CLAMPIN
g. MODE
h. REFSENSE
i. VREF
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9280 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
DRVDD
AVSS
DRVSS
DRVSS
AVDD
AVDD
AVSS
AVSS
AVDD
22
21
REFTF
REFTS
AVDD
AVSS
AVDD
AVSS
25
24
REFBS
REFBF
AVDD
AVSS
AVDD
AVSS
AVDD
AVSS
AVDD
AVSS
AVSS
AVDD
AVSS
AVDD
AVDD
AVSS
AVDD
AVSS
AVDD
AVSS
a. D0–D7, OTR
b. Three-State, Standby, Clamp
c. CLK
d. AIN
e. Reference
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