參數(shù)資料
型號(hào)： AD9244BSTRL-65
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： 14-Bit, 40/65 MSPS Monolithic A/D Converter
中文描述： 1-CH 14-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP48
封裝： MS-026-BBC, LQFP-48
文件頁(yè)數(shù)： 2/36頁(yè)
文件大?。?/td> 1845K
代理商： AD9244BSTRL-65
REV. A
–2–
AD9244–SPECIFICATIONS
DC SPECIFICATIONS
Test
Level
AD9244BST-65
Min
Typ
AD9244BST-40
Min
Typ
Parameter
Temp
Max
Max
Unit
RESOLUTION
Full
VI
14
14
Bits
DC ACCURACY
No Missing Codes
Offset Error
Gain Error
1
Differential Nonlinearity (DNL)
2
Full
Full
Full
Full
25
°
C
Full
VI
VI
VI
VI
V
V
Guaranteed
Guaranteed
Bits
% FSR
% FSR
LSB
LSB
LSB
±
0.3
±
0.6
±
1.4
±
2.0
±
1.0
±
0.3
±
0.6
±
1.4
±
2.0
±
1.0
±
0.7
±
1.4
±
0.6
±
1.3
Integral Nonlinearity (INL)
2
TEMPERATURE DRIFT
Offset Error
Gain Error (EXT VREF)
1
Gain Error (INT VREF)
3
Full
Full
Full
V
V
V
±
2.0
±
2.3
±
25
±
2.0
±
2.3
±
25
ppm/
°
C
ppm/
°
C
ppm/
°
C
INTERNAL VOLTAGE REFERENCE
Output Voltage Error (2 VREF)
Load Regulation @ 1 mA
Output Voltage Error (1 VREF)
Load Regulation @ 0.5 mA
Input Resistance
Full
Full
Full
Full
Full
VI
V
IV
V
V
±
29
±
29
mV
mV
mV
mV
k
0.5
0.5
±
15
±
15
0.25
5
0.25
5
INPUT REFERRED NOISE
VREF = 2 V
VREF = 1 V
25
°
C
25
°
C
V
V
0.8
1.5
0.8
1.5
LSB rms
LSB rms
ANALOG INPUT
Input Voltage Range (Differential)
VREF = 2 V
VREF = 1 V
Common-Mode Voltage
Input Capacitance
4
Input Bias Current
5
Analog Bandwidth (Full Power)
Full
Full
Full
25
°
C
25
°
C
25
°
C
V
V
V
V
V
V
2
1
2
1
V p-p
V p-p
V
pF
μ
A
MHz
0.5
4
0.5
4
10
500
750
10
500
750
POWER SUPPLIES
Supply Voltages
AVDD
DRVDD
Supply Current
IAVDD
IDRVDD
PSRR
Full
Full
IV
IV
4.75
2.7
5
5.25
5.25
4.75
2.7
5
5.25
5.25
V
V
Full
Full
Full
V
V
V
109
12
±
0.05
64
8
±
0.05
mA
mA
% FSR
POWER CONSUMPTION
DC Input
6
Sine Wave Input
Full
Full
V
VI
550
590
300
345
mW
mW
640
370
NOTES
1
Gain error is based on the ADC only (with a fixed 2.0 V external reference).
2
Measured at maximum clock rate, f
IN
= 2.4 MHz, full-scale sine wave, with approximately 5 pF loading on each output bit.
3
Includes internal voltage reference error.
4
Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure 2d for the equivalent analog input structure.
5
Input bias current is due to the inputs looking like a resistor that is dependent on the clock rate.
6
Measured with dc input at maximum clock rate.
Specifications subject to change without notice.
(AVDD = 5 V, DRVDD = 3 V, f
SAMPLE
= 65 MSPS (–65) or 40 MSPS (–40), Differential Clock Inputs, VREF = 2 V,
External Reference, Differential Analog Inputs, unless otherwise noted.)
相關(guān)PDF資料
PDF描述
AD9244-EVAL 14-Bit, 40/65 MSPS Monolithic A/D Converter
AD9244BST-65 14-Bit, 40/65 MSPS Monolithic A/D Converter
AD9244BST-40 14-Bit, 40/65 MSPS Monolithic A/D Converter
AD9245 14-Bit, 80 MSPS, 3 V A/D Converter
AD9245BCP-80 14-Bit, 80 MSPS, 3 V A/D Converter
相關(guān)代理商/技術(shù)參數(shù)
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AD9244BSTZ-65 制造商:Analog Devices 功能描述:IC 14BIT ADC SMD 9244 LQFP48 制造商:Analog Devices 功能描述:IC, 14BIT ADC, SMD, 9244, LQFP48
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