參數(shù)資料
型號(hào)： AD9244-EVAL
廠商： Analog Devices, Inc.
英文描述： 14-Bit, 40/65 MSPS Monolithic A/D Converter
中文描述： 14位，六十五分之四十MSPS的單片機(jī)的A / D轉(zhuǎn)換器
文件頁(yè)數(shù)： 19/36頁(yè)
文件大?。?/td> 1845K
代理商： AD9244-EVAL
REV. A
AD9244
–19–
DIGITAL INPUTS AND OUTPUTS
Digital Outputs
Table III details the relationship among the ADC input, OTR,
and digital output format.
Data Format Select (DFS)
The AD9244 may be programmed for straight binary or twos
complement data on the digital outputs. Connect the DFS pin to
AGND for straight binary and to AVDD for twos complement.
Digital Output Driver Considerations
The AD9244 output drivers can be configured to interface with
5 V or 3.3 V logic families by setting DRVDD to 5 V or 3.3 V,
respectively. The output drivers are sized to provide sufficient
output current to drive a wide variety of logic families. How-
ever, large drive currents tend to cause glitches on the supplies
and may affect converter performance. Applications requiring
the ADC to drive large capacitive loads or large fanouts may
require external buffers or latches.
Out-of-Range (OTR)
An out-of-range condition exists when the analog input voltage is
beyond the input range of the ADC. OTR is a digital output that
is updated along with the data output corresponding to the par-
ticular sampled input voltage. Thus, OTR has the same pipeline
latency as the digital data. OTR is low when the analog input
voltage is within the analog input range and high when the analog
input voltage exceeds the input range as shown in Figure 12.
OTR will remain high until the analog input returns to within the
input range and another conversion is completed. By logically
AND-ing OTR with the MSB and its complement, overrange
high or underrange low conditions can be detected. Table IV is a
truth table for the overrange/underrange range circuit in Figure 13,
which uses NAND gates. Systems requiring programmable gain
conditioning of the AD9244 can, after eight clock cycles, detect an
out-of-range condition, thus eliminating gain selection iterations.
Also, OTR can be used for digital offset and gain calibration.
1
0
0
1111 1111 1111
1111 1111 1111
1111 1111 1110
0
0
1
0000 0000 0001
0000 0000 0000
0000 0000 0000
OTR DATA OUTPUTS
OTR
+FS – 1 LSB
+FS – 1/2 LSB
+FS
–FS
–FS + 1/2 LSB
–FS – 1/2 LSB
Figure 12. OTR Relation to Input Voltage and Output Data
Table IV. Output Data Format
OTR
MSB
Analog Input Is
0
0
1
1
0
1
0
1
Within Range
Within Range
Underrange
Overrange
MSB
OTR
MSB
OVER = 1
UNDER = 1
Figure 13. Overrange/Underrange Logic
Digital Output Enable Function (OEB)
The AD9244 has three-state ability. If the OEB pin is low, the
output data drivers are enabled. If the OEB pin is high, the
output data drivers are placed in a high impedance state. It is
not intended for rapid access to the data bus. Note that OEB is
referenced to the digital supplies (DRVDD) and should not
exceed that supply voltage.
Table III. Output Data Format
Twos
Complement
Mode
Binary
Output Mode
Input (V)
Condition (V)
OTR
VIN+
–
VIN
–
VIN+
–
VIN
–
VIN+
–
VIN
–
VIN+
–
VIN
–
VIN+
–
VIN
–
<
–
VREF
–
0.5 LSB
=
–
VREF
= 0
= +VREF
–
1.0 LSB
> +VREF
–
0.5 LSB
00 0000 0000 0000
00 0000 0000 0000
10 0000 0000 0000
11 1111 1111 1111
11 1111 1111 1111
10 0000 0000 0000
10 0000 0000 0000
00 0000 0000 0000
01 1111 1111 1111
01 1111 1111 1111
1
0
0
0
1
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