參數(shù)資料
型號(hào)： AD9212-65EBZ
廠商： Analog Devices, Inc.
英文描述： Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
中文描述： 八路，10位，六十五分之四十〇 MSPS的串行LVDS 1.8弗吉尼亞州/ D轉(zhuǎn)換器
文件頁(yè)數(shù)： 35/56頁(yè)
文件大?。?/td> 1840K
代理商： AD9212-65EBZ
AD9212
Power and Ground Recommendations
When connecting power to the AD9212, it is recommended
that two separate 1.8 V supplies be used: one for analog (AVDD)
and one for digital (DRVDD). If only one supply is available, it
should be routed to the AVDD first and then tapped off and
isolated with a ferrite bead or a filter choke preceded by
decoupling capacitors for the DRVDD. The user can employ
several different decoupling capacitors to cover both high and
low frequencies. These should be located close to the point of
entry at the PC board level and close to the parts with minimal
trace length.
A single PC board ground plane should be sufficient when
using the AD9212. With proper decoupling and smart parti-
tioning of the PC board’s analog, digital, and clock sections,
optimum performance is easily achieved.
Rev. 0 | Page 35 of 56
Exposed Paddle Thermal Heat Slug Recommendations
It is required that the exposed paddle on the underside of the
ADC is connected to analog ground (AGND) to achieve the
best electrical and thermal performance of the AD9212. An
exposed continuous copper plane on the PCB should mate to
the AD9212 exposed paddle, Pin 0. The copper plane should
have several vias to achieve the lowest possible resistive thermal
path for heat dissipation to flow through the bottom of the PCB.
These vias should be solder filled or plugged.
To maximize the coverage and adhesion between the ADC and
PCB, partition the continuous copper plane by overlaying a
silkscreen on the PCB into several uniform sections. This provides
several tie points between the two during the reflow process.
Using one continuous plane with no partitions only guarantees
one tie point between the ADC and PCB. See Figure 73 for a
PCB layout example. For detailed information on packaging
and the PCB layout of chip scale packages, see the AN-772
Application Note,
A Design and Manufacturing Guide for the
Lead Frame Chip Scale Package (LFCSP)
, at
www.analog.com
.
SILKSCREEN PARTITION
PIN 1 INDICATOR
0
Figure 73. Typical PCB Layout
相關(guān)PDF資料
PDF描述
AD9212BCPZ-40 Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9212BCPZ-65 Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
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AD9212ABCPZRL7-65 功能描述:IC ADC 10BIT SRL 65MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極
AD9212BCPZ-40 制造商:Analog Devices 功能描述:ADC Octal Pipelined 40Msps 10-bit Serial 64-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10BIT ADC 40/65MSPS 1.8V SMD 制造商:Analog Devices 功能描述:IC, 10BIT ADC, 40/65MSPS, 1.8V, SMD
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